Gripping Power, Inc
17
EPS200 User s Manual
4.4.5. (C2) Clear timer 2.
This command resets the T2 timer to 00:00. If timer 2
is reset with the high voltage in the on state, the timer will reset and continue timing
until the high voltage is turned off.
Send:
>0 C2 [CR]
Receive:
>0 C2 [CR]
4.4.6. (R2) Read timer 2. The R2 command returns the time that the high voltage has
been on, since the prior reset of the T2 timer. This time can be used as a chuck or
chamber preventative maintenance indicator.
Send:
>0 R2 [CR]
Receive:
>0 5h 49m 24s [CR]
4.4.7. (R3) Read timer 3. The R3 command returns the contents of the OEM
cumulative high voltage on period timer. This timer may not be reset by the user.
Send:
>0 R3 [CR]
Receive:
>0 345h 23m [CR]
4.5. Digital output control. The EPS200 provides the user with three digital output bits.
Two of those bits are available to the user for emulating mechanical clamp interfaces. The
bits are identified as clamp is up and clamp is down.
When a clamping/chuck operation is started, clamp is up is normally cleared and clamp
is down is set active. When the chucking operation is completed, clamp is up is
normally set and clamp is down is cleared. The user must set the bits to the preferred state
throughout a program.
If an abort (AB) command is received, or a fault is cleared, the EPS200 will automatically
reset the bits to the default state of clamp is up set and clamp is down cleared.
4.5.1. (CD) Clear the clamp is down bit. The CD command sets the clamp is
down output bit off. The clamp is down output is an open-collector output and will
be left floating when the bit is in the off condition
Send:
>0 CD [CR]
Receive:
>0 CD [CR]
4.5.2. (CU) Clear the clamp is up bit. The CU command sets the clamp is up
output bit off. The clamp is up output is an open-collector output and will be
left floating when the bit is in the off condition.
Send:
>0 CU [CR]
Receive:
>0 CU [CR]
4.5.3. (SD) Set the clamp is down bit. The SD command sets the clamp is down
output bit on. The clamp is down output is an open-collector output and will be
driven low, to digital common, when the bit is in the on condition.
Send:
>0 SD [CR]
Receive:
>0 SD [CR]