GRAPHTEC CE5000 SERIES, Service Manual

Page: 141 / 146

CE5000-UM-251-9370 11-13
11 BLOCK DIAGRAMS AND CIRCUIT DIAGRAMS
11.2.12 Main Board CPU Section (PN0021-01)
1
1
D[1]
D[7]
D[11]
D[9]
D[6]
D[14]
D[2]
D[5]
D[10]
D[8]
D[13]
D[3]
D[0]
D[4]
D[15]
D[12]
D[13
]
D[15
]
D[3
] D[7
]
D[10
]
D[12
]
D[0
] D[4
] D[1
] D[8
]
D[11
]
D[14
]
D[2
] D[5
] D[6
] D[9
] A[0
] A[1
] A[2
] A[3
] A[4
] A[5
] A[6
] A[7
] A[8
] A[9
]
A[10
]
A[11
]
A[12
]
A[13
]
A[14
]
A[15
]
A[16
]
A[17
]
A[18
]
A[19
]
A[20
]
A[21
]
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
A[10]
A[11]
A[12]
A[13]
A[14]
A[15]
A[16]
A[17]
A[18]
A[19]
A[20]
A[21]
DIP[0
]
DIP[1
]
DIP[2
]
DIP[3
]
LCDB[7
]
LCDB[6
]
LCDB[1
]
LCDB[0
]
LCDB[5
]
LCDB[2
]
LCDB[3
]
LCDB[4
]
DIP[1
]
DIP[0
]
DIP[3
]
DIP[2
]
RA31 4.7K
1
2
3
4
5
6
7
8
+3.3
V
+3.3
V
+1.8V_OU
T
R1
8
1K
160
8
C1
3
0.1
u
160
8
C1
2
0.1
u
160
8
DG
DG
DG
RA123
4.7K
1
2
3
4 5
6
7
8
RA124
4.7K
1
2
3
4 5
6
7
8
C11
0 0.1
u
160
8
C11
1 0.1
u
160
8
C11
2 0.1
u
160
8
C30.1
u
160
8
C4
0.1
u
160
8
C60.1
u
160
8
C7
0.1
u
160
8
C8
0.1
u
160
8
C9
0.1
u
160
8
C11
9 0.1
u
160
8
C12
0 0.1
u
160
8
C12
1 0.1
u
160
8
C12
2 0.1
u
160
8
C12
3 0.1
u
160
8
C12
4 0.1
u
160
8
+3.3
V
+3.3
V
+3.3
V +3.3
V
+3.3
V +3.3
V
+3.3
V +3.3
V
+3.3
V +3.3
V
+1.8V_OU
T
+1.8V_OU
T
+1.8V_OU
T
+1.8V_OU
T
+1.8V_OU
T
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG DG
DG
DG
DG
DG
C12
9 0.1
u
160
8
+3.3
V
DG
RA103 1K
1
2
3
4 5
6
7
8
RA104 1K
1
2
3
4 5
6
7
8
RA105 1K
1
2
3
4 5
6
7
8
RA102 1K
1
2
3
4 5
6
7
8
+3.3
V
RA111 1K
1
2
3
4 5
6
7
8
+3.3
V
RA112 1K
1
2
3
4 5
6
7
8
RA113 1K
1
2
3
4 5
6
7
8
RA114 1K
1
2
3
4 5
6
7
8
RA110 1K
1
2
3
4 5
6
7
8
DG
+3.3
V
C11
33p
1608
C10
33p
1608
C13
8 0.1
u
160
8
DG
C13
7 0.1
u
160
8
+1.8V_OU
T
+1.8V_OU
T
C13
9 470
p
160
8
C14
0 470
p
160
8
U5
HD6417709SF133B
V
ADTRG/PTH[5
]
12
5
AN[0]/PTL[0
]
19
9
AN[1]/PTL[1
]
20
0
AN[2]/PTL[2
]
20
1
AN[3]/PTL[3
]
20
2
AN[4]/PTL[4
]
20
3
AN[5]/PTL[5
]
20
4
AN[6]/DA[1]/PTL[6
]
20
6
AN[7]/DA[0]/PTL[7
]
20
7
ASEMD0/PTG[6
]
12
7
AUDCK/PTH[6
]
15
1
BRE
Q
12
2
CA
19
4
CTS2/IRQ5/SCPT[7
]
17
6
DREQ0/PTD[4
]
19
1
DREQ1/PTD[6
]
19
2
EXTA
L
15
6
EXTAL
2
5
IOIS16/PTG[7
]
12
6
IRLS0/PTF[0]/PINT[8
]
14
3
IRLS1/PTF[1]/PINT[9
]
14
2
IRLS2/PTF[2]/PINT[10
]
14
1
IRLS3/PTF[3]/PINT[11
]
14
0
IRQ0/IRL0/PTH[0
]
8
IRQ1/IRL1/PTH[1
]
9
IRQ2/IRL2/PTH[2
]
10
IRQ3/IRL3/PTH[3
]
11
IRQ4/PTH[4
]
12
MD
0
14
4
MD
1
1
MD
2
2
MD
3
19
5
MD
4
19
6
MD
5
19
7
NM
I
7
RESET
M
12
4
RESET
P
19
3
RXD0/SCPT[0
]
17
1
RXD1/SCPT[2
]
17
2
RXD2/SCPT[4
]
17
4
TCK/PTF[4]/PINT[12
]
13
9
TDI/PTF[5]/PINT[13
]
13
8
TMS/PTF[6]/PINT[14
]
13
7
TRST/PTF[7]/PINT[15
]
13
6
WAI
T
12
3
ASEBRKAK/PTG[5
]
12
8
AUDATA[0]/PTG[0
]
13
5
AUDATA[1]/PTG[1
]
13
3
AUDATA[2]/PTG[2
]
13
1
AUDATA[3]/PTG[3
]
13
0
AUDSYNC/PTE[7
]
94
BS/PTK[4
]
87
CAP
1
14
6
CAP
2
14
9
CASL/PTJ[2
]
10
8
CASU/PTJ[3
]
11
0
CE2A/PTE[4
]
10
3
CE2B/PTE[5
]
10
4
CKE/PTK[5
]
10
5
CKI
O
16
2
CS2/PTK[0
]
98
CS3/PTK[1
]
99
CS4/PTK[2
]
10
0
CS5/CE1A/PTK[3
]
10
1
DACK0/PTD[5
]
11
4
DACK1/PTD[7
]
11
5
DRAK0/PTD[1
]
18
9
DRAK1/PTD[0
]
19
0
MCS[0]/PTC[0]/PINT[0
]
18
8
MCS[1]/PTC[1]/PINT[1
]
18
7
MCS[2]/PTC[2]/PINT[2
]
18
6
MCS[3]/PTC[3]/PINT[3
]
18
5
MCS[4]/PTC[4]/PINT[4
]
18
0
MCS[5]/PTC[5]/PINT[5
]
17
9
MCS[6]/PTC[6]/PINT[6
]
17
8
MCS[7]/PTC[7]/PINT[7
]
17
7
PTE[1
]
11
9
PTE[3
]
11
7
PTE[6
]
11
6
PTG[4]/CKIO
2
12
9
PTJ[1
]
10
7
PTJ[4
]
11
2
PTJ[5
]
11
3
RAS3L/PTJ[0
]
10
6
RAS3U/PTE[2
]
11
8
RESETOUT/PTD[2
]
18
4
RTS2/SCPT[6
]
17
0
SCK0/SCPT[1
]
16
5
SCK1/SCPT[3
]
16
7
SCK2/SCPT[5
]
16
9
STATUS0/PTJ[6
]
15
7
STATUS1/PTJ[7
]
15
8
TCLK/PTH[7
]
15
9
TDO/PTE[0
]
12
0
WAKEUP/PTD[3
]
18
2
WE2/DQMUL/ICIORD/PTK[6
]
91
WE3/DQMUU/ICIOWR/PTK[7
]
92
AVSS1
198
AVSS2
208
VSS-PLL
1
14
7
VSS-PLL
2
14
8
VSS-RTC
6
VSS1
27
VSS2
79
VSS3
132
VSS4
152
VSS5
153
VSS6
173
VSSQ1
19
VSSQ2
33
VSSQ3
45
VSSQ4
57
VSSQ5
69
VSSQ6
83
VSSQ8
161
VSSQ7
95
VSSQ9
109
VSSQ10
181
D0
52
D1
51
D2
50
D3
49
D4
48
D5
46
D6
44
D7
43
D8
42
D9
41
D1
0
40
D1
1
39
D1
2
38
D1
3
37
D1
4
36
D1
5
34
D16/PTA[0
]
32
D17/PTA[1
]
31
D18/PTA[2
]
30
D19/PTA[3
]
28
D20/PTA[4
]
26
D21/PTA[5
]
25
D22/PTA[6
]
24
D23/PTA[7
]
23
D24/PTB[0
]
22
D25/PTB[1
]
20
D26/PTB[2
]
18
D27/PTB[3
]
17
D28/PTB[4
]
16
D29/PTB[5
]
15
D30/PTB[6
]
14
D31/PTB[7
]
13
A0
53
A1
54
A2
55
A3
56
A4
58
A5
60
A6
61
A7
62
A8
63
A9
64
A1
0
65
A1
1
66
A1
2
67
A1
3
68
A1
4
70
A1
5
72
A1
6
73
A1
7
74
A1
8
75
A1
9
76
A2
0
77
A2
1
78
A2
2
80
A2
3
82
A2
4
84
A2
5
86
BAC
K
12
1
CS0/%MCS[0
]
96
CS6/CE1
B
10
2
IRQOU
T
16
0
RD
88
RD/W
R
93
TXD0/SCPT[0
]
16
4
TXD1/SCPT[2
]
16
6
TXD2/SCPT[4
]
16
8
WE0/DQML
L
89
WE1/DQMLU/W
E
90
XTA
L
15
5
XTAL
2
4
AVCC
205
VCC-PLL
1
14
5
VCC-PLL
2
15
0
VCC-RTC
3
VCC1
29
VCC2
81
VCC3
134
VCC4
154
VCC5
175
VCCQ1
21
VCCQ2
35
VCCQ3
47
VCCQ4
59
VCCQ5
71
VCCQ6
85
VCCQ7
97
VCCQ8
111
VCCQ9
163
VCCQ10
183
DG
RA151
4.7K
1
2
3
4 5
6
7
8
+3.3
V
RA30 4.7K
1
2
3
4 5
6
7
8
R2
1K
1608
RA169 1K
1
2
3
4 5
6
7
8
A[21-0
]
RTS-D
Z
FPGA_CS
1
FPGA_CS
0
PMDAT
A
FLASH_C
S
PMCL
K
RD/W
R
PMC
S
DTR-D
Z
TXD
0
CK
E
WE
0
RA
S
WE
1
CA
S
CL
K
RD
RESET
P
USB_C
S
SDRAM_C
S
RXD
0
DSR0
Z
TOMB
O
USBIN
T
LOCALIN
T
SRVIN
T
RY_B
Y
CTS0
Z
RESET
P
RA170
4.7K
1
2
3
4 5
6
7
8
D[15-0
]
PN0021-01
A
CPU BLOC
K
+3.3
V
X1
16.0MHZ
RA125
4.7K
1
2
3
4 5
6
7
8
RA147
4.7K
1
2
3
4 5
6
7
8
DI
N
CCL
K
RESE
T
RA175
4.7K
1
2
3
4 5
6
7
8
RESET
P
PROGRA
M
DON
E
INI
T
RA176
4.7K
1
2
3
4 5
6
7
8
+3.3
V
LCDB[0-7
]
J6
0
A3-14PA-2SV(71
)
1 2 3 4 5 6 7 8 9
1011 1213 14
JP3
A3-4PA-2SV(71)
1 2
3 4
DG
DG
DG
DG
DG
J6
1
BM04B-SRSS-T
B
1 2 3 4
+3.3
V
DG
C20
1 0.1
u
160
8
DG
+3.3
V
EEP_C
S
EEP_S
K
EEP_D
O
EEP_D
I
LCDB_R
W
LCDB_R
S
LCDB
E
EEP_C
S
EEP_D
I
RMSLE
D
MENULE
D
FPGA_RE
S
EEP_D
O
EEP_S
K
FANO
N
RA177
4.7K
1
2
3
4
5
6
7
8
DREQ
0
DREQ
1
DREQ
0
DREQ
1
+3.3
V
DG
DTR-D
Z
DTR-D
Z
+3.3
V
EXTAL2_PL
L
FANON_I
N
VC
C
FANON_OU
T
EXTAL2_PL
L
+1.8V_OU
T
DG
RA3
4.7K
1
2
3
4 5
6
7
8
U11
6 93LC66AT-I/S
N
CS
1
SK
2
DI
3
DO
4
GN
D 5
NC
6
6
NC
7
7
VC
C 8
D48 1SS352
D47 1SS352
D44 1SS352
D43 1SS352
C23
9 1000
p
160
8
DG
SW
1
CHS-04B
1
1 2 3 4
8 7 6 5
DG
DG
+3.3
V
Q2HAT1069
C
6
5 1
43
2
+1.8
V
+1.8V_OU
T
C24
2 0.1
u
160
8
R216
2M
1608
RNA50C27AU
S
U12
0
VDD3
3
1
GN
D
4
RES
N
3
RES
P
2
SW
G
5
VDD1
8
6
MR
8
CRex
t
7
C24
1 220
p
160
8
TC
K
#TRS
T
TD
O
#ASEBR
K
TM
S
TD
I
RESET
P
GN
D
19-2
1
33-3
5 45-4
7
57-5
9 69-7
1 83-8
5 95-9
7
109-11
1
161-16
3
181-18
3
205-20
8
27-2
9
79-8
1
132-13
4
153-15
4
173-17
5
145-14
7
150-14
8
GN
D
GN
D
GN
D
GN
D
GN
D
NC
+3.3
V
RX
D
TX
D
GN
D
PULLU
P
D43,D4
4
are not installed.
J6
1 is not installed.
RA
3 is not
intalled
S D
G
10
%
5%
5%