3 FPGA Circuits
3.2 Download Interface
DBUG398-1.1E
10(25)
3.2.2
USB Download Circuit
Figure 3-1 Connection Diagram of FPGA USB Downloading and Configuration
MSPI_CK_A
MSPI_CS_A
MSPI_DI_A
MSPI_DO
93
94
95
96
TMS
TCK
TDI
TDO_A
USB to JTAG
Chip
USB_D+
USB_D-
14
13
16
18
FLASH
Configuration
U8
U6
U5
3.2.3
Downloading the Data Stream
The data stream file can be downloaded in the following ways:
1.
SRAM:
Scan the device and download the bit file after powering the device on.
The Done indicator lights up to denote that the download has been
successful.
Note!
The mode is independent of the values of MODE0 and MODE1.
2.
Internal Flash:
Power on and download. After downloading the data stream file
successfully, power down to reset and load the bit file from the internal
Flash, and when the Done indicator lights up to denote that the
download has been successful.
Note!
Before downloading the bit file and the internal FLASH starts, MODE0 and MODE1
need to set to "00".
3.
External Flash Configuration:
Power on and download. Power down to reset and load the bit file from
the external flash. The Done indicator lights up to denote that the
download has been successful.
Note!
When downloading external Flash, you need to set MODE0 and MODE1 to "1"
and "1".
When loading external Flash, you need to set MODE0 and MODE1 to "0" and
"1".
