GS1572 A Guide to Designing with the GS1572
(EB1572)
Reference Design
46282 - 1
November 2009
7 of 18
Proprietary & Confidential
3. Evaluation Board User’s Guide
The GS1572 board demonstrates the operation of the GS1572, allowing control of input
signals and probing of output signals from the device. In addition to the GS1572, the
GS1572 uses the GO1555 Voltage Controlled Oscillator.
A 10-bit or 20-bit signal at HD or SD rates must be supplied, along with a parallel clock.
The serialized output stream is made available on the output.
The board contains headers and leads allowing output signals to be easily probed and
chip features to be enabled. It also provides a JTAG interface and access to the GS1572’s
internal registers via the Gennum Serial Peripheral Interface (GSPI). A push button
allows the board to easily be reset.
3.1 Power
The GS1572 evaluation board requires a +5V power supply and a ground connection.
Power regulation to +3.3V and +1.8V is done on board (see
Power supply and ground isolation on the GS1572 is based on the recommendations
discussed in
Power Supply and Ground Isolation on page 4
Figure 3-1: Power Block
3.2 Inputs
The GS1572 evaluation board includes a 48 pin parallel input connector. Twenty pins of
the connector are used for the 20-bit input of the GS1572, DIN [19:0]. An additional bit
connects to the PCLK input pin of the GS1572 (see
). For more information on
the function of these pins, please refer to the GS1572 Data Sheet. The remaining 27 bits
of the parallel bus connect to ground.
The input format is defined by setting the SD/HD, SMPTE_BYPASS, and DVB_ASI
jumpers. The input data bus width is controlled by setting the 20bit/10bit jumper.
ON BOARD
POWER REGULATORS
I/O VOLTAGE SELECTION
C5VDC HERE
POWER BLOCK
