GSP665x-EVBIMS2
High Power IMS 2 Evaluation Platform
Technical Manual
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GSP665x-EVBIMS2 TM rev. 201021
© 2020 GaN Systems Inc.
Please refer to the Evaluation Board/Kit Important Notice on page 22
The following additional measures are taken to optimize the design further.
•
The IMS 2 evaluation platform is implemented as a two-board asssembly. The gate drive circuitry
is assembled on the GSP665HPMB-EVBIMS2, a multi-layer FR4 PCB mother board. This includes
the gate driver ICs, an isolated push-pull power supply to power the driver IC, and DC decoupling
capacitors. The GaN E-HEMTs are mounted to the IMS half bridge board (GSP66508HB-EVBIMS2
and GSP66516B-EVBIMS2). This approach addresses the shortcomings of implementing the design
on a single layer IMS board.
•
While a large copper area is preferred to maximize heat spreading and handle high current, the
area of copper at the switching node (high dv/dt) needs to be minimized to reduce the parasitic
coupling capacitance to the metal substrate. An IMS board with thicker dielectric layer (100um) is
chosen on this design to further reduce this effect.
1.3
IMS 2 Half Bridge Board Design
Figure 5 IMS 2 half bridge power board (GSP66508HB-EVBIMS2)
The IMS 2 half bridge power board is populated with the following components:
•
Q1 and Q2:
GS66516B or GS66508B E-HEMTs in a half bridge configuration.
o
6kW GSP66516HB-EVBIMS2: Q1/Q2 GS66516B.
o
3kW GSP66508HB-EVBIMS2: Q1/Q2 GS66508B.
•
J1, J2, J3:
o
Connector Header Surface Mount 12 position 0.050" (1.27mm) (Samtec Inc., P/N: FTS-106-
02-F-DV).
o
These terminals are designed to carry the main current and gate signals.