GainSpan GS2011M Datasheet Download

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Pin-out and Signal Description

GS2011M Low Power WiFi Module Data Sheet

GS2011Mxx Device Pin-out

Confidential

Preliminary

GS2011M-DS-001211, Release 0.9

GPIO26/
UART1_CTS

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART1Clear to Send
input (see Note 6)

GPIO27/
UART1_RTS

VDDIO

Pull-down (see Note 2)4

Digital
Input/Output

GPIO/UART1 1 Request to
Send Output (see Note 6).
This pin is used for Program
Mode.

GPIO3/
UART1_RX

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART1 Receive
Input

GPIO32/
SDIO_DAT2/
UART1_TX

VDDIO

Pull-down

Digital
Input/Output

GPIO/SDIO_DATA Bit
2/UART 1 Transmitter
Output

GPIO1/
UART0_TX

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART0 Transmitter
Output. This pin is used for
Code Restore.

GPIO25/
UART0_RTS

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART0 Request to
Send Output (see Note 6).
This pin is used for Program
Select.

GPIO0/
UART0_RX

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART0 Receive
Input

GPIO24/
UART0_CTS

VDDIO

Pull-down

Digital
Input/Output

GPIO/UART0 Clear to
Send Input (See Note 6)

43 GPIO31/PWM2

VDDIO

Pull-down

16
(see Note 7)

Digital
Input/Output

GPIO/Pulse Width
Modulation Output 2

44 GPIO30/PWM1

VDDIO

Pull-down

16
(see Note 7)

Digital
Input/Output

GPIO/Pulse Width
Modulation Output 1

45 GPIO29/I2C_CLK VDDIO

Pull-down

Digital
Input/Output

GPIO/I2C_CLK (see Note
3)

GPIO37/
SDIO_DAT1_INT

VDDIO

Pull-down (see Note 9)4

Digital
Input/Output

GPIO/4-bit SDIO DATA bit
1/SDIO SPI Mode Interrupt

EXT_RESET_n
(see Note 5)

VDDIO

Digital Open
Drain
Input/Output

Module Hardware Reset
Input and Power Supply
Reset Monitor Indicator

Active Low

48 GND

Not Applicable

Analog port

Ground

49 VPP (see Note 8) VPP

Analog port

Programming Voltage for
OTP Memory

Table 7 GS2011Mxx Module Pin Signal Description (Continued)

Pins

Name

Voltage

Domain

Internal Bias after

Hardware Reset

Drive

Strength

(mA)

Signal State

Description

Summary of Contents for GS2011M

Page 1: ...ease 0 9 03 18 2014 Copyright 2014 GainSpan All rights reserved Prelim inary Confidential GS2011M Low Power WiFi Module Data Sheet GS2011M DS 001211 GainSpan 802 11b g n Ultra Low Power WiFi Series Modules ...

Page 2: ...Statement This equipment complies with FCC IC radiation exposure limits set forth for an uncontrolled environment This equipment should be installed and operated with minimum distance 20cm between the radiator your body This transmitter must not be co located or operating in conjunction with any other antenna or transmitter must not be co located or operating in conjunction with any other antenna ...

Page 3: ...reçue y compris les interférences pouvant provoquer un fonctionnement indésirable de l appareil Manual Information That Must be Included The user s manual for end users must include the following information in a prominent location IMPORTANT NOTE To comply with FCC IC RF exposure compliance requirements the antenna used for this transmitter must be installed to provide a separation distance of at ...

Page 4: ...r warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right GainSpan products are not authorized for use as critical components in medical lifesaving or life sustaining applications GainSpan may make changes to specifications and product descriptions at any time without notice Trademark GainSpan is a registe...

Page 5: ...er 2 GS2011M Overview 15 Product Overview 15 GS2011M Module Product Features 15 Chapter 3 GS2011M Architecture 19 Architecture Description 19 Wireless LAN and System Control Subsystem 21 Onboard Antenna RF Port Radio 21 802 11 MAC 21 802 11 PHY 22 RF Analog 23 Network Services Subsystem 23 APP CPU 23 Crypto Engine 23 Memory Subsystem 23 SRAM 23 ROM 24 OTP ROM 24 Flash Interface 24 Clocks 24 Real T...

Page 6: ...acteristics 45 Absolute Maximum Ratings 45 Operating Conditions 46 Internal 1 8V Regulator 46 I O DC Specifications 47 I O Digital Specifications Tri State Pin Types 4mA 12mA and 16mA 47 I O Digital Specifications for VDDIO 3 0V to 3 6V 47 I O Digital Specifications for VDDIO 2 25V to 2 75V 48 I O Digital Specs for VDDIO 1 7V to 1 98V 49 RTC I O Specifications 50 Power Consumption Estimate 50 802 ...

Page 7: ...1M Low Power WiFi Data Sheet contains the following new information listed in Table 1 page 7 Table 1 Revision History Version Date Remarks 0 6 April 2013 Initial Release 0 7 January 2014 Updated Pinout and Signal description diagram and table see GS2011Mxx Device Pin out page 37 Updated SDIO interface clock frequency see GS2100M Module Product Features page 15 Updated Power Consumption Estimates a...

Page 8: ...ommands subcommands or command elements Table 2 page 8 describes the text conventions used in this manual for software procedures that are explained using the AT command line interface Table 2 Document Text Conventions Convention Type Description command syntax monospaced font This monospaced font represents command strings entered on a command line and sample source code AT XXXX Proportional font...

Page 9: ...ints inclusive Do not enter angle brackets as part of any command SSID Equal sign Separates the variable from explanatory text Is entered as part of the command PROCESSID CID dot period Allows the repetition of the element that immediately follows it multiple times Do not enter as part of the command AA NN can be expanded to 1 01 1 02 1 03 A B C D IP address IPv4 style address 10 0 11 123 X X X X ...

Page 10: ...pful suggestions needed in understanding a feature or references to material not available in the manual Alert Alerts you of potential damage to a program device or system or the loss of data or service Caution Cautions you about a situation that could result in minor or moderate bodily injury if not avoided Warning Warns you of a potential situation that could result in death or serious bodily in...

Page 11: ...erence example board GS S2W APP PRG RG 001208 GainSpan Serial to WiFi Adapter Application Programmer Reference Guide Provides a complete listing of AT serial commands including configuration examples for initiating maintaining and evaluating GainSpan WiFi series modules GS2K EVB HW UG 001210 GainSpan GS2000 Based Module Evaluation Board Hardware User Guide Provides instructions on how to setup and...

Page 12: ...ormation or assistance perform the following steps 1 Point your browser to http www gainspan com 2 Click Contact and click Request Support 3 Log in using your customer Email and Password 4 Select the Location and click Contact 5 Select Support Question tab 6 Select Add New Question 7 Enter your technical support question product information and a brief description The following information is disp...

Page 13: ...umber and serial number of component You name organization name telephone number and fax number Description of the failure 4 The support representative validates your request and issues an RMA number for return of the components 5 Pack the component for shipment Guidelines for Packing Components for Shipment To pack an ship individual components When you return components make sure they are adequa...

Page 14: ...Documents tab to view GainSpan Non Disclosure Agreement NDA 8 Click Download on the Item Browser section to open or save the document Ordering Information To order GainSpan s GS2011Mxx low power module contact a GainSpan Sales Distributor Representative Table 6 page 14 lists the GainSpan device information NOTE You must first contact GainSpan to set up an account and obtain a customer user name an...

Page 15: ...essing services for variety of applications while leverage existing 802 11 wireless network infrastructures GS2011M Module Product Features Family of modules with different antenna and output power options GS2011MIx 22 8mm 0 90in x 32 5 mm 1 28in x 3 63mm 0 143in 48 pin PCB Surface Mount Package Two SKU s are GS2011MIZ on board antenna GS2011MIE external antenna The two SKUs are pin to pin compati...

Page 16: ...r Platform 1st Cortex M3 processor WLAN CPU for WLAN software Implements 802 11 b g n WLAN protocol services 320 KB dedicated SRAM 512 KB dedicated ROM 2nd Cortex M3 processor APP CPU for networking software Implements networking protocol stacks and user application software 384 KB dedicated SRAM 512 KB dedicated ROM 64KB shared dual ported SRAM for inter processor communications 320 KB assignable...

Page 17: ...are configurable UART Two 2 multi purpose UART interfaces operating in full duplex mode 16450 16550 compatible Optional support for flow control using RTS CTS signaling for high data transfer rates Standard baud rate from 9600 bps up to 921 6 kbps additional support for higher non standard rates using baud rates up to 7 5 MHz GPIOs Up to 27 configurable general purpose I O Single 3 3V supply optio...

Page 18: ...11M Low Power WiFi Module Data Sheet GS2011M Module Product Features 18 Confidential Preliminary GS2011M DS 001211 Release 0 9 Low power mode operations Standby Sleep and Deep Sleep FCC IC ETSI TELEC WiFi Certification TBD ...

Page 19: ... RF and on board antenna or external antenna options On module 4 Mega Byte FLASH device that contains the user embedded applications and data such as web pages Variety of interfaces are available such as two UART blocks using only two data lines per port with optional hardware flow controls two SPI blocks one SDIO is shared function with one for the SPI interfaces I2C with Master or slave operatio...

Page 20: ...GS2011M Architecture GS2011M Low Power WiFi Module Data Sheet Architecture Description 20 Confidential Preliminary GS2011M DS 001211 Release 0 9 Figure 1 GS2011M Block Diagram ...

Page 21: ...er In addition it contains hardware support for AES CCMP encryption for WPA2 and RC4 encryption for WEP WPA TKIP encryption decryption Onboard Antenna RF Port Radio The GS2011Mxx modules have fully integrated RF frequency synthesizer reference clock low power PA and a high power PA GS2011MIE for extended range applications Both TX and RX chain in the module incorporate internal power control loops...

Page 22: ...unctionality to support 802 11h The PHY implements the complete baseband Tx and Rx pipeline It interfaces with the MAC to perform transmit and receive operations It interfaces directly to the ADC and DAC The PHY implements the Transmit power control receive Automatic Gain Control and other RF control signals to enable transmit and receive The PHY also computes the CCA for MAC use Key Features Comp...

Page 23: ...pto engine has the raw generic interface for cipher and hash MAC functions such as AES DES SHA and RC4 It also includes two optional engines to provide further offload the PKA and RNG modules These provide additional methods for public key acceleration functions and random number generation The engine includes a DMA engine that allows the engine to perform cryptographic operation on data packets i...

Page 24: ...PU subsystem ROM ROM is provided in each CPU subsystem to provide the boot code and other functional code that are not expected to change regularly Each CPU has 512KB of ROM OTP ROM The GS2000 device includes a 64Kbit OTP ROM used for storing MAC ID and other information such as security keys etc The APP and WLAN subsystem each contain 32Kbits 4Kbytes of OTP memory Flash Interface The GS2000 SoC h...

Page 25: ...ounter as the primary reference for all timing events and standby awake management 4 programmable IO pins with specific default behavior These pins are in the RTC IO domain One DC_DC_CNTL is setup as output pin to control external regulator Three others RTC_IO which can be programmed to be either Maximum of two wakeup counters to generate periodic output 32 bit Alarm inputs to wake up the GS2011M ...

Page 26: ... up of the remainder of the external system and provide a 1 5 days max period The RTC_IO pins can be configured as inputs ALARMS or output WAKE UP pins The RTC includes a Power On Reset POR circuit to eliminate the need for an external component The RTC contains low leakage non volatile battery powered RAM to enable storage of data that needs to be preserved It also includes a brown out detector t...

Page 27: ...ce which allows the CPU to configure the operational registers residing inside theAHB Slave core The CIS and CSA area is located inside the internal memory of CPU subsystem The SDIO Registers CCCR and FBR are programmed by both the SD Host through the SD Bus and CPU through the AHB bus via Operational registers The SDIO block implements the AHB master to initiate transfers to and from the system m...

Page 28: ...est servicing transmit and receive FIFOs and indicate FIFO status and overrun underrun The clock bit rate is SW programmable In master mode the SPI block in GS2000 can perform up to 30 MHz and in slave mode up to 10 MHz serial clock The interface type data size and interrupt masks are programmable It supports DMA working in conjunction with the uDMA engine UART Interface The UART interface impleme...

Page 29: ...Oscillator A conversion requires 1 clock cycles The ADC supports three measurement modes continuous single or periodic The sample data will be stored in a CPU readable FIFO The file is an 8 deep FIFO The FIFO has SW configurable level interrupt New samples are dropped if FIFO is full and new data is received prior to FW servicing the FIFO then the sample is dropped PWM The PWM consists of three id...

Page 30: ...tem States The system states of the GS2011Mxx system are as follows Power OFF No power source connected to the system Standby In the standby state only the RTC portion of the GS2011M is powered from the VRTC pin The other power supplies are turned off by the DC_DC_CNTL pin being low To achieve the lowest standby current other supply pins should be powered on off together controlled by the DC_DC_CN...

Page 31: ...WLAN CPU remains in the reset state during System Configuration The APP CPU then executes the required system configurations releases the WLAN CPU from reset and transitions to the Power ON state The System Configuration state is also entered on transition from the Power ON state to the Standby state to complete necessary preparations before shutting off the power to the core system Power ON This ...

Page 32: ...l command to put it into standby The DC_DC_CNTL pin would control the power supplies It is NOT reliable for the external host to directly control the power supplies if VRTC is to be left turned on This is because the RTC would not know when to isolate itself from the rest of the chip and might get corrupted during power up or power down EXT_RESET_n pin If the external host is driving the EXT_RESET...

Page 33: ...plication power supply connections Figure 4 page 33 shows the GS2011Mxx power supply connection and Figure 5 page 34 shows the GS2011Mxx in battery powered with optimized active mode Figure 4 GS2011Mxx Always ON Power Supply Connection Notes 1 Always ON is obtained by trying EN_1V8 to 1 which is the enable for the 1 8V voltage regulator 2 With this connection method standby current will not be opt...

Page 34: ...umption while still supporting standby state of the module see Figure 6 page 35 In this connection it is important to note the following 2 Input voltage to VRTC must always be ON to keep the RTC powered so that the 32KHz crystal is running 3 VDDIO power should be OFF during this state Recommendation is to use DC_DC_CNTL to also control the unit supplying the voltage to VDDIO 4 DC_DC_CNTL must be c...

Page 35: ...ized standby lowest current consumption state of the module In this connection it is important to note the following 2 Input voltage to VRTC must always be ON to keep the RTC powered so that the 32KHz crystal is running 3 VDDIO and VIN_3V3power should be OFF during this state Recommendation is to use DC_DC_CNTL to also control the unit supplying the voltage to VDDIO and VIN_3V3 4 DC_DC_CNTL must b...

Page 36: ...GS2011M Architecture GS2011M Low Power WiFi Module Data Sheet Wireless LAN and System Control Subsystem 36 Confidential Preliminary GS2011M DS 001211 Release 0 9 This page intentionally left blank ...

Page 37: ...ut and Signal Description This chapter describes the GainSpan GS2011M Low Power module architecture GS2011Mxx Device Pin out page 37 GS2011Mxx Device Pin out Figure 7 page 37 shows the GS2011Mxx device pin out diagram Figure 7 GS2011Mxx Device Pin out Diagram Module Top View ...

Page 38: ...RTC Pull down see Note 1 1 RTC Digital Input Output Embedded RealTime Clock Input Output 0 9 VRTC VRTC Not Applicable Analog port Embedded RealTime Clock Power Supply 10 DC_DC_CNTRL RTC_IO_4 VRTC see Note 1 1 RTC Digital Input Output VIN_3V3 Regulator ControlOutput RTCDigital Input Output 11 ADC1 VIN_3V3 Not Applicable Analog Input General Analog to Digital Converter 1 12 ADC2 VIN_3V3 Not Applicab...

Page 39: ...t GPIO Inter Integrated Circuit Data 27 GPIO36 SDIO_DAT0 SPI0_DOUT VDDIO Pull down see Note 1 4 Digital Input Output GPIO SDIODataBit0 SPI0 Transmit Data Output to the HOST 28 GPIO35 SDIO_CLK SPI0_CLK VDDIO Pull down see Note 1 4 Digital Input Output GPIO SDIO Clock SPI0 Clock Input from the HOST 29 GPIO33 SDIO_DAT3 SPI0_CS_n_0 VDDIO Pull up see Note 1 4 Digital Input Output GPIO SDIO Data Bit 3 S...

Page 40: ...s used for Program Select 41 GPIO0 UART0_RX VDDIO Pull down 4 Digital Input Output GPIO UART0 Receive Input 42 GPIO24 UART0_CTS VDDIO Pull down 12 Digital Input Output GPIO UART0 Clear to Send Input See Note 6 43 GPIO31 PWM2 VDDIO Pull down 16 see Note 7 Digital Input Output GPIO Pulse Width Modulation Output 2 44 GPIO30 PWM1 VDDIO Pull down 16 see Note 7 Digital Input Output GPIO Pulse Width Modu...

Page 41: ...s out of power on reset After power on reset this pin is an input It is not necessary to assert reset to the GS2011M after power on since the GS2011 has a built in power on reset Also the EXT_RESET_n signal does not clear the RTC RTC RAM or the SRAM If the external host is driving the EXT_RESET_n pin it MUST do so with an open drain driver This is because this pin also must be able to be driven by...

Page 42: ...t wspi_dout spi0_cs_n_1 15 gpio7 spi1_dout spi1_dout wspi_dout spi1_din wspi_din spi0_cs_n_2 16 VOUT_1V8 17 GND 18 gpio5 spi1_clk spi1_clk wspi_clk pwm0 traceclk spi0_cs_n_3 19 gpio4 spi1_cs_n_0 spi1_cs_n_0 wspi_cs_n_0 spi0_cs_n_4 reserved clk_rtc 20 gpio13 spi1_cs_n_1 spi1_cs_n_1 pwm2 spi0_cs_n_5 tracedata 0 wspi_cs_n_1 21 gpio21 clk_rtc clk_rtc spi1_cs_n_2 clk_hs_xtal tracedata 1 spi0_cs_n_6 22 ...

Page 43: ...a 2 spi1_cs_n_12 39 gpio1 uart0_tx uart0_tx wuart_tx pwm1 tracedata 0 spi1_dout 40 gpio25 uart0_rts uart0_rts wuart_rts reserved tracedata 1 spi1_clk 41 gpio24 uart0_cts uart0_rx wuart_rx pwm2 tracedata 2 spi1_din 42 gpio24 uart0_cts uart0_cts wuart_cts reserved tracedata 3 spi1_cs_n_0 43 gpio31 pwm2 pwm2 spi1_dout usart1_tx traceclk wuart_tx 44 gpio30 pwm1 pwm1 spi1_din uart1_rx reserved wuart_rx...

Page 44: ... in flash If a software designer wants to restore the execution code to one of the backup copy it can be accomplished by asserting the appropriate GPIO pins as shown in the table below during power up or reset Table 9 GS2011M Pin Program and Code Restore Program Mode GPIO 27 Program Select GPIO 25 Code Restore GPIO 21 or GPIO 1 Description 0 X 0 Normal boot 0 0 1 Factory Code Restore 0 1 1 Previou...

Page 45: ... cause permanent damage to the GS2011Mxx and must be avoided Sustained operation beyond the normal operating conditions may affect the long term reliability of the module Note 1 Reference domain voltage is the Voltage Domain Refer to the section on GS2011Mxx Module Pins Description For limitations on state voltage ranges refer to the section GS2011Mxx Module Pins Description Table 10 Absolute Maxi...

Page 46: ... 1 8V regulator parameters VIN_3V3 VDDIO VRTC 3 3V Temp 25oC fOSC 3 0MHz Table 11 Operating Conditions Parameter Symbol Minimum Typical Maximum Unit Extended Temperature Range TA 40 85 oC RTC Power Supply VRTC 1 6 3 3 3 6 V I O Supply Voltage VDDIO 1 7 3 3 3 6 V Single Supply Port GS2011MIx VIN_3V3 2 7 3 3 3 6 V Signal Pin Voltage1 VI 0 Voltage Domain V VPP2 VPP 5 5 5 75 6 0 V Table 12 Internal 1 ...

Page 47: ...igh Voltage VIH 2 0 VDDIO V Schmitt trigger Low to High threshold point VT 1 62 1 75 1 91 V Schmitt trigger High to Low threshold point VT 1 16 1 29 1 45 V Input Leakage Current IL 10 μA Pull up down disabled Tri State Output Leakage Current IOZ 10 μA Pull up down disabled Pull Up Resistor Ru 34K 51K 81K Ω Pull Down Resistor Rd 35K 51K 88K Ω Output Low Voltage VOL 0 4 V Output High Voltage VOH 2 4...

Page 48: ...er Low to High threshold point VT 1 27 1 40 1 50 V Schmitt trigger High to Low threshold point VT 0 85 0 98 1 10 V Input Leakage Current IL 10 μA Pull up down disabled Tri State Output Leakage Current IOZ 10 μA Pull up down disabled Pull Up Resistor Ru 43K 69K 120K Ω Pull Down Resistor Rd 41K 66K 124K Ω Output Low Voltage VOL 0 7 V Output High Voltage VOH 1 7 V Low Level Output Current VOL max IOL...

Page 49: ...T 0 95 1 06 1 16 V SchmitttriggerHighto Low threshold point VT 0 581 0 69 0 79 V Input Leakage Current IL 10 μA Pull up down disabled Tri State Output Leakage Current IOZ 10 μA Pull up down disabled Pull Up Resistor Ru 66K 114K 211K Ω Pull Down Resistor Rd 58K 103K 204K Ω Output Low Voltage VOL 0 0 45 V Output High Voltage VOH 1 35 V Low Level Output Current VOL max IOL 2 6 8 0 10 8 4 8 14 7 19 7 ...

Page 50: ...n Table 16 RTC I O Parameters Parameter Symbol Minimum Typical Maximum Unit Note Supply Voltage 1 6 3 6 V Input Low Voltage VIL 0 3 VDD V Input High Voltage VIH 0l7 VDD V Input Leakage Current IL 0 1 μA Pullup Current IPU 1 μA Pulldown Current IPU 1 μA Output Low Voltage VOL 0 4 V IL 1mA or 4mA Output High Voltage VOHJ VDD 0 4 V IL 1mA or 4mA Table 17 Power Consumption in Different States System S...

Page 51: ...equency Range 2412 2497 MHz Radio bit rate 1 HT20 MCS7 Mbps Transmit Receive Specification for GS2011M Output power average 15 12 8 dBm 11b 1Mbps BPSK DSSS 11n MCS 0 6 5 Mbps BPSK OFDM 11n MCS 7 72 Mbps 64 QAM OFDM Spectrum Mask dBr Meets 802 11 requirement for selected data rates ReceiveSensitivityat antenna port 93 74 71 dBm 11b 1 Mbps BPSK DSSS 11g 54 Mbps 64 QAM OFDM 11n MCS 7 72 Mbps 64 QAM O...

Page 52: ...nternal reference Reference Buffer on 3 3V 550 μA FS 32KHz internal reference Reference Buffer on 3 3V 450 μA FS 2Mbps External reference Reference Buffer off 3 3V 180 μA FS 32KHz internal reference Reference Buffer off 3 3V ADC Offset Error 30 30 mV ADC Gain Error 8 8 LSB See Note 2 Error in Internal Reference Voltage without Trim 5 5 Error in Internal Reference Voltage with Trim 2 5 2 5 Table 19...

Page 53: ...inSpan GS2011M package and layout guidelines GS2011Mxx Recommended PCB Footprint and Dimensions page 53 GS2011Mxx Recommended PCB Footprint and Dimensions Figure 8 page 53 shows the GS2011MIx Module PCB Footprint Figure 9 page 54 shows the GS2011MIx Module Dimensions Figure 8 GS2011MIx Module Recommended PCB Footprint in inches ...

Page 54: ...x it is recommended that extra thick solder mask 5 mils be used to prevent shorting High speed signals should be kept as far as possible from the antenna and RF areas of the GS2011Mxx 4 In performing SMT or manual soldering of the module to the base board first align the row of pins from 18 through 31 onto the base board and then match the other two rows In additional to the guidelines note the fo...

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