U41161-J-Z126-1-76
63
Standard processing in SVP mode
User frames and subframes
The following table shows the additional entries required for each of the three main
functions in other input fields:
RATE CONTROL =>
Defines program operation
1
PROCESS
continual program operation
2
I-STEP
step-by-step command execution
ADRS TYPE =>
Entry for address compare stop:
entry under ADRS SET is
1
ABSOLUTE
an absolute address
2
LOGICAL
a logical address
ADRS COMP SELECT =>
Address compare stop if compare stop address is same as
1
ANY
any address
2
OPERAND FETCH(OFETCH) operand read address
3
OPERAND(OSTORE)
operands write address
4
INSTRUCTION ADRS(IA)
instruction address
5
IA & OFETCH
instruction and operand read address
6
OFETCH & OSTORE
operand read and write address
UNIT ADRS =>
Device address for output of a firmware dump
ADRS SET =>
Compare stop address
XXXX
Address space larger than 32 bits
XXXXXXXX
32-bit address
Input field
Function
RATE
CONTROL
UNIT
ADRS
ADRS
TYPE
ADRS
COMP
SELECT
ADRS
SET
ADRS
COMP
MODE
1 RATE CONTROL
o
x
x
x
x
x
2 ADRS COMP STOP
x
x
o
o
o
o
3 FIRM DUMP
x
o
x
x
x
x
4 HSA DUMP
x
x
x
x
x
x
o: entry required
x: entry not required
Summary of Contents for S140
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