Fujitsu MCM3064SS, Product Manual

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7.6 Bus Phases
C156-E228-02EN 7-31
•
The minimum pulse width is Assertion Period.
•
The minimum period between the trailing edge of a pulse and the leading
edge of the next pulse is Negation Period.
• The period between the leading edges of a pulse and the next pulse is equal to
or greater than the time defined by the Transfer Period parameter.
Figure 7.15 shows the timing rule of the synchronous mode.
a. Transfer from TARG to INIT
The TARG specifies the data transfer direction by the I/O signal. If the I/O
signal is true, data is transferred from the TARG to the INIT. Transfer
processing is as follows:
1) After the TARG sends valid data on the data bus (DB7 to DB0, P), if a
period elapses that is equal to or longer than the sum of the Deskew
Delay time and the Cable Skew Delay time, the TARG sends the REQ
pulse.
2) Starting with the rise of the REQ pulse, the TARG must hold values on
the data bus valid for a period equal to or longer than the sum of the
Deskew Delay time, the Cable Skew Delay time, and the Hold time. The
TARG must send a REQ pulse having a width of at least the Assertion
Period.
3) After compensating for the period defined in 2, the TARG transfers
subsequent data in bytes within the range defined by the REQ/ACK
Offset parameter.
4) Starting with the rise of the REQ pulse, the INIT reads data on the data
bus (DB7 to DB0, P) within the Hold time. After reading the data, the
INIT sends the ACK pulse as a receive completion notification.
b. Transfer from INIT to TARG
If the I/O signal is false, data is transferred from the INIT to the TARG.
Transfer processing is as follows:
1) The TARG repeats the sending of the REQ pulse to request that data be
sent until the number of REQ pulses reaches a value specified by the
REQ/ACK Offset parameter.
2) The INIT transfers one byte of data each time the INIT receives the REQ
pulse from the TARG. Upon receiving the REQ pulse, the INIT sends
valid data on the data bus (DB7 to DB0, P). After the elapse of a period
equal to or longer than the sum of the Deskew Delay time and the Cable
Skew Delay time, the INIT sends the ACK pulse.
3) Starting with the rise of the ACK pulse, the INIT must hold the values on
the data bus valid for a period equal to or longer than the sum of the
Deskew Delay time, the Cable Skew Delay time, and the Hold time. The
TARG must send an ACK pulse having a width of at least the Assertion
Period.