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Preliminary

7(36)

Prepared

Document Number

Manfred Ortmann

Approved

Checked

Date

Revision

Storage

2008-05-14

PA 3.5

Mycable01

2 467 / GDC Board

2.1 System Architecture

The system architecture of the 467 / GDC board is shown in picture 2-1.

Pic. 2-1: 467 / GDC board block diagram

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Summary of Contents for 467

Page 1: ... Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 Receiver Info M Carstens Behrens mycable GmbH Manual 467 GDC Board Version PA 3 5 May 14 2008 http www fujitsu com emea services microelectronics ...

Page 2: ...Preliminary 2 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 ...

Page 3: ...who work with the 467 GDC board version PA3 for evaluation and development purpose Enclosures None Product Information The 467 GDC board is populated with the 32 bit CPU MB91F467DAPFV Flash memory SDRAM SRAM interfaces as UART Ethernet CAN USB SD memory card GPIOs video inputs and outputs and an interface for different GDC modules Up to now two GDC modules are available for this board a module wit...

Page 4: ...A 3 1 2008 03 25 mo Create this document PA 3 2 2008 04 09 mo 2 2 3 CPU Mode pin description added PA 3 3 2008 05 05 mo 2 2 3 CPU Internal comment removed PA 3 4 2008 05 06 mo 2 2 3 CPU Mode pin description corrected PA 3 5 2008 05 14 mo Product name Contact Information mycable GmbH Michael Carstens Behrens hardware and commercial Email mcb mycable de Tel 49 4321 55956 55 ...

Page 5: ...7 2 2 Function Units 9 2 2 1 Power Supply 10 2 2 2 Reset 10 2 2 3 CPU 11 2 2 4 Graphic Display Controller GDC Module 14 2 2 5 Serial Ports 19 2 2 6 Ethernet 20 2 2 7 Universal Serial Bus USB 21 2 2 8 CAN Interfaces 22 2 2 9 Video Inputs 24 2 2 10 Video Outputs 25 2 2 11 Buttons 29 2 2 12 LEDs 29 2 2 13 GPIOs 30 2 2 14 Secure Digital SD Memory Card Interface 32 2 3 Hardware Variants 33 2 4 Placemen...

Page 6: ...on and users manual Hardware architecture Mechanical information It is the engineer s reference for evaluation system development and prototyping based on the module This document covers all available hardware versions regarding their configuration options and revision state 1 2 Putting into Operation The 467 GDC board can be used without GDC module But do not plug the GDC module if the power supp...

Page 7: ... Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 467 GDC Board 2 1 System Architecture The system architecture of the 467 GDC board is shown in picture 2 1 Pic 2 1 467 GDC board block diagram ...

Page 8: ...Preliminary 8 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 Picture 2 2 467 GDC board top side Picture 2 3 467 GDC board bottom side ...

Page 9: ...n Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 2 Function Units Overview in the available interfaces 10 100 Ethernet 2x serial ports 2x CAN DVI I Power supply Video Input USB GPIOs Video Output SD Memory Card Slot GDC module interface ...

Page 10: ...gainst wrong polarity D109 and overcurrent F100 is implemented but a too high current can damage the power supply or can produce great heat Do not plug the GDC module when the power supply is on The required voltages 3 3 V and 5 0 V will be regulated from the dual switching power regulator LT1940EFE PBF from Linear Technologies U100 on the board 2 2 2 Reset The triple processor supervisor TPS3307 ...

Page 11: ...e CPU MD_2 and MD_1 are set fixed to logical 0 The logical level of mode pin MD_0 can be set with switch SW500 If the switch is open the MD_0 pin is logical 1 If the switch is closed the MD_0 pin is logical 0 MD 2 0 000 Internal ROM Vector mode Reset vector access internal Flash This is the standard setting where the internal Flash memory of the device is available see Hardware Manual MB91460 Seri...

Page 12: ...MPU ch Flash external 1024 kB 64 kB Flash Protection D bus RAM 32 kB GP RAM 32 kB Direct mapped cache 8 kB Boot ROM 4 kB RTC 1 ch Free Running Timer 8 ch ICU 8 ch OCU 8 ch Reload Timer 8 ch PPG 12 ch PFM 1 ch Sound Generator 1 ch UpDown Counter 3 ch C_CAN 3 ch 32 msg buffer LIN USART 5 ch 4 ch FIFO I2C 3 ch FR external bus 32 bit address 32 bit data 26 bit address 32 bit data External Interrupts 1...

Page 13: ...eliminary 13 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 Following picture shows the block diagram of the CPU More details see datasheet ...

Page 14: ...01 2 2 4 GraphicDisplayController GDC Module For a GDC module the 2 54 mm connectors X300 and X301 SSM 120 S DV P from Samtec and the 1 27 mm connector X302 FLE 120 01 G DV A P from Samtec are available Detailed information on the GDC module see the manual to this board Do not plug the GDC module when the power supply is on ...

Page 15: ... data signal 9 CPU_D22 CPU data signal 10 CPU_D23 CPU data signal 11 CPU_D24 CPU data signal 12 CPU_D25 CPU data signal 13 CPU_D26 CPU data signal 14 CPU_D27 CPU data signal 15 CPU_D28 CPU data signal 16 CPU_D29 CPU data signal 17 CPU_D30 CPU data signal 18 CPU_D31 CPU data signal 19 VCC33 3 3 V 20 VCC33 3 3 V 21 VCC33 3 3 V 22 VCC33 3 3 V 23 GDC_XCS CPU chip select 24 GDC_RD CPU read 25 GDC_XWE0 ...

Page 16: ...m the connector X301 Pin Signal Function 1 GND Ground 2 GND Ground 3 NC Not connected 4 GDC_A2 CPU address signal 5 GDC_A3 CPU address signal 6 GDC_A4 CPU address signal 7 GDC_A5 CPU address signal 8 GDC_A6 CPU address signal 9 GDC_A7 CPU address signal 10 GDC_A8 CPU address signal 11 GDC_A9 CPU address signal 12 GDC_A10 CPU address signal 13 GDC_A11 CPU address signal 14 GDC_A12 CPU address signa...

Page 17: ...NC Not connected 33 GND_CV Analog ground to X480and X481 34 GND_CV Analog ground to X480and X481 35 AVIN0 Analog video input 0 from X480 36 NC Not connected 37 AVIN1 Analog video input 1from X481 38 NC Not connected 39 GND Ground 40 GND Ground Table 2 2 Pin assignment X301 Following table shows the assignment of pins signals and function from the connector X302 Pin Signal Function 1 GND Ground 2 G...

Page 18: ...nal 19 CPU_A24 CPU address signal 20 VCC33 3 3 V 21 VCC33 3 3 V 22 GDC_A25 CPU address signal 23 GDC_XWE3 CPU write enable 3 24 GDC_XWE2 CPU write enable 2 25 EXT_GPIO1 GPIO 1 26 EXT_GPIO0 GPIO 0 27 S_VSYNC Vertical sync 28 EXT_GPIO2 GPIO 2 29 S_DE Data enable 30 S_HSYNC Horicontal sync 31 S_CSYNC Composite sync 32 S_DCLK Data clock 33 AOUTB Analog video output blue 34 GND Ground 35 GDC_AVS Analog...

Page 19: ...nced electrostatic discharge ESD protection the MAX3243EIPW U800 U801 are used Following table shows the assignment of pins signals and function from the UART connector X800 Connector X801 is identical For X801 the index 0 has to be changed to 1 Pin Signal Function 1 RS232_0_CD Data carrier detect 2 RS232_0_TXD Transmit data 3 RS232_0_RXD Receive data 4 RS232_0_DSR Data set ready 5 GND Ground 6 RS...

Page 20: ...te node or assert back pressure on the remote node by generating network collision The default ethernet setting by pin strapping at the SPD_SEL pin of U600 is speed 100 Mbps half duplex and auto negotation enabled because this pin will be strapped to VCC by the 10k Ohm resistor R609 It is possible to strap this pin to ground by a 0 Ohm resistor R612 then the settings would be speed 10 Mbps half du...

Page 21: ...TDI Chip ID Security Dongle FT232R U601 from Future Technology Devices International Ltd This is an USB to serial UART interface The USB interface is available at connector X601 Following table shows the assignment of pins signals and function from the USB connector X601 Pin Signal Function 1 VCC 3 3 V power supply for USB device 2 D USB data signal minus 3 D USB data signal plus 4 ID Not used 5 G...

Page 22: ... fast as possible with no limitation on the rise and fall slope The rise and fall slope can be adjusted by connecting a resistor to ground at pin 8 since the slope is proportional to the pin s output current Slope control is implemented with a resistor value of 10 kΩ to achieve a slew rate of 15 V us and a value of 100 kΩ to achieve 2 0 V μs slew rate The SN65HVD234 enter a low current standby mod...

Page 23: ...120 Ohm Termination for CAN 0 SW701 120 Ohm Termination for CAN 1 Following table shows the assignment of pins signals and function from the CAN connector X700 Pin Signal Function 1 VCC33 3 3V switchable via R702 2 EXT_CAN0L CAN 0 Low 3 GND Ground 4 EXT_CAN1L CAN 1 Low 5 GND Ground 6 GND Ground 7 EXT_CAN0H CAN 0 High 8 EXT_CAN1H CAN 1 High 9 VCC50 5V swichable via R701 Table 2 6 Pin assignment X80...

Page 24: ...fred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 2 9 VideoInputs The Cinch video connectors X480 AVIN0 and X481 AVIN1 are connected directly to GDC module interface connector X301 pin 35 and 37 Ground pin 33 and 34 ...

Page 25: ...The signals from X405 are connected to X403 transmitter SiI164CT64 U402 and triple 8 Bit high speed video digital to analog converter DAC ADV7125JSTZ240 U401 The type from X402 and X403 is FTSH 120 01 L DV EJ P from Samtec The transmitter SiI164CT64 U400 and U402 from Silicon Image uses PanelLink Digital technology to support displays ranging from VGA to UXGA resolutions 25 165 Mpps in a single li...

Page 26: ...he GDC to an analog video signals Outputs from U403 are connected to DVI I connector X400 Outputs from U401 are connected to DVI I connector X401 over multiplexer U404 FSAV330MTC MPLEX_CTRL Following table shows the assignment of pins signals and function from the connectors X402 and X403 For X403 the index 0 has to be changed to 1 Pin Signal Function 1 GND Ground 2 GND Ground 3 VO0_B0 Digital RGB...

Page 27: ...NC Video output interface vertical sync output 33 VO0_DE DE CSYNC 34 VO0_CSYNC DE CSYNC 35 NC Not connected 36 VO0_CLK_RGBD Video output interface dot clock output 37 I2C_SCL I2C interface 0 SCL 38 I2C_SDA I2C interface 0 SDA 39 GND Ground 40 GND Ground Table 2 7 Pin assignment X402 and X403 Following table shows the assignment of pins signals and function from the UART connector X404 and X405 For...

Page 28: ...reen 22 VO0_G5 Digital RGB output 5 Data green 23 VO0_G6 Digital RGB output 6 Data green 24 VO0_G7 Digital RGB output 7 Data green 25 VO0_R0 Digital RGB output 0 Data red 26 VO0_R1 Digital RGB output 1 Data red 27 VO0_R2 Digital RGB output 2 Data red 28 VO0_R3 Digital RGB output 3 Data red 29 VO0_R4 Digital RGB output 4 Data red 30 VO0_R5 Digital RGB output 5 Data red 31 VO0_R6 Digital RGB output ...

Page 29: ...be pressed the interrupt 1 P24_1 will be generated If the button SW503 which is labeled with TEST2 will be pressed the interrupt 7 P24_7 will be generated If the button SW504 which is labeled with TEST3 will be pressed the interrupt 6 P24_6 will be generated 2 2 12 LEDs The RESET LED D102 is on if the reset is active The 3 3V LED D106 is on if the 3 3 V power supply is on independent of the limits...

Page 30: ...vision Storage 2008 05 14 PA 3 5 Mycable01 Following table shows the assignment of LEDs and GPIOs LED GPIO D500 P25_0 D501 P25_1 D502 P25_2 D503 P25_3 Table 2 9 LED GPIO assignment 2 2 13 GPIOs Some GPIOs from the CPU are available at connected X900 FTSH 110 01 L DV K A P from Samtec ...

Page 31: ...d function from the connector X900 Pin Signal Function 1 VCC33 3 3 V 2 GPIO0 P14_0 3 GPIO1 P14_1 4 GPIO2 P16_4 5 GPIO3 P16_5 6 GPIO4 P16_6 7 GPIO5 P16_7 8 GPIO6 P27_0 9 GPIO7 P27_1 10 GPIO8 P27_2 11 GPIO9 P27_3 12 GPIO10 P27_4 13 GPIO11 P27_5 14 GPIO12 P27_6 15 GPIO13 P27_7 16 GPIO14 P26_0 17 GPIO15 P26_1 18 GPIO16 P26_2 19 GPIO17 P26_3 20 GND Ground Table 2 10 Pin assignment X900 ...

Page 32: ...or the SD memory card will be switched from GPIO P14_5 A logical 0 at GPIO P14_5 switches the supply voltage ON Following table shows the assignment of pins signals and function Pin Signal Function 1 SD_DAT3 SD data line 3 2 SD_CMD Command line 3 GND Ground 4 SD_CARD_VCC Supply voltage 5 SD_CLK Clock 6 GND Ground 7 SD_DAT0 SD data line 0 8 SD_DAT1 SD data line 1 9 SD_DAT2 SD data line 2 10 SD_XMCD...

Page 33: ...liminary 33 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 3 Hardware Variants Up to now only PCB version PA3 without variants is available ...

Page 34: ...Preliminary 34 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 4 Placement of Components ...

Page 35: ...Preliminary 35 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 ...

Page 36: ...Preliminary 36 36 Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008 05 14 PA 3 5 Mycable01 2 5 Mechanical Dimensions The 467 GDC board has a size of 160 0 x 100 0 mm ...

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