Mainboard User’s Manual
Advanced Chipset Features
44
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Bank Interleave :
The interleave number of internal banks,
can be set to 2 way, 4 way interleave or disabled. For VCM
and 16Mb type dram chips, the bank interleave is fixed at 2
way interleave. When the dram timing is selected by SPD, it
will be set by the value on SPD of the RAM module(DDR or
SDR). The default setting is “Disabled.
Memory Hole :
In order to improve performance, some space in
memory can be reserved for ISA cards. The default setting is
“Disabled.
P2C/C2P Concurrency :
This item allows you to enable/disable the
PCI to CPU and CPU to PCI concurrently. The default setting
is ”Enabled”.
System BIOS Cacheable :
When set to “Enabled” the System BIOS
will be cached for faster execution. The default setting is “Enabled”.
Video RAM Cacheable :
Selecting Enabled allows caching of the
video RAM , resulting in better system performance. However, if any
program is written to this memory area, a system error may result.
The default setting is “Enabled”.
Frame Buffer Size :
This item allows you to control the VGA frame
buffer size. The default setting is “16M”.
AGP Aperture Size :
Select the size of Accelerated Graphics Port
(AGP) aperture. The aperture is a portion of the PCI memory address
range dedicated to graphics memory address space. Ho st cycles that
hit the aperture range are forwarded to the AGP without any
translation. The default setting is “64M”.
