2 References
The documents below may be available only under a non-disclosure agreement (NDA). To request access to these
documents, contact your local field applications engineer or sales representative.
• T4240 QorIQ Integrated Multicore Communications Processor Family Reference Manual (document T4240RM)
• T4240 QorIQ Integrated Multicore Communications Processor Family Data Sheet (document T4240)
3 Preparing board
The figure below shows the front panel of the T4240RDB.
Figure 1. T4240RDB front panel
The steps to prepare the T4240RDB for use are:
1. Ensure that the power switch is off.
2. Set switch and jumper header settings.
3. Default Configuration: CPU: 1.666GHz, DDR: 1600MHz
4. Attach an RS-232 cable between the T4240RDB UART1 port and host computer.
5. Open a serial console tool on the host computer to communicate with the T4240RDB.
6. Configure the host computer's serial port with the following settings:
• Data rate: 115200 bps
• Number of data bits: 8
• Parity: None
• Number of stop bits: 1
• Flow control: Hardware/None
7. Switch on the power button on the front side of the chassis. The board will boot and show the u-boot console messages.
U-Boot 2013.01-gecbda14-dirty (Jul 31 2013 - 11:06:06)
CPU0: T4240E, Version: 1.0, (0x82480010)
Core: E6500, Version: 1.0, (0x80400010)
Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz,
CPU3:1666.667 MHz,
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667
MHz,
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz,
CPU11:1666.667 MHz,
CCB:666.667 MHz,
DDR:800 MHz (1600 MT/s data rate) (Asynchronous), IFC:166.667 MHz
FMAN1: 466.667 MHz
FMAN2: 466.667 MHz
References
T4240RDB Quick Start Guide, Rev 0, 11/2013
2
Freescale Semiconductor, Inc.
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