• Ethernet
• ETH0 - ETH7: Connected to SGMII PHY - VSC8664
• ETH8 - ETH11: Connected to XFI Quad SFP+ PHY CS4340
• UART
• UART interface: Supports two UARTs up to 115200 bps for console display; dual RJ45 slot is used for the two
UART ports
• Miscellaneous
• LED
• Power LED (green indicates power on; yellow indicates stand by)
• Link LED (green indicates 1 Gbps and yellow indicates 10/100 Mbps) on each RJ45 ethernet connector
• Active LED (green) on each RJ45 ethernet connector
• JTAG for debugging
• Reset: Hardware reset
• I
2
C
• Serial EEPROM, for board identification
• Real-time clock
• PCB
• Power button is located at the front of the casing
• Reset button is located inside of the casing
• Power LED and Ethernet LED are located at the front of the casing
• Power
• ATX Power Supply, 300W
6.3 Port map
The table below shows how ETH matches to Linux and Uboot.
Label on the Front Panel
Label in Linux
Label in Uboot
ETH0
Fm1-mac1
FM1@ DTSEC1
ETH1
Fm1-mac2
FM1@ DTSEC2
ETH2
Fm1-mac3
FM1@ DTSEC3
ETH3
Fm1-mac4
FM1@ DTSEC4
ETH4
Fm2-mac1
FM2@ DTSEC1
ETH5
Fm2-mac2
FM2@ DTSEC2
ETH6
Fm2-mac3
FM2@ DTSEC3
ETH7
Fm2-mac4
FM2@ DTSEC4
ETH8
Fm2-mac9
FM2@ TGEC1
ETH9
Fm2-mac10
FM2@ TGEC2
ETH10
Fm1-mac10
FM1@ TGEC2
ETH11
Fm1-mac9
FM1@ TGEC1
The image below shows the port map of T4240.
System board interface
T4240RDB Quick Start Guide, Rev 0, 11/2013
8
Freescale Semiconductor, Inc.
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