Freescale Semiconductor MPC566EVB, User Manual, Page: 56 / 100

3-4 MPC564EVB User’s Manual
Operational Procedure
Figure 3-1 shows the dUBG operational mode.
Figure 3-1. Flow Diagram of dBUG Operational Mode.
3.2.2 System Initialization
The act of powering up the board will initialize the system. The processor is reset and dBUG is
invoked.
dBUG performs the following configurations of internal resources during the initialization. The IP
bit is set by default, placing the vector table at 0xFFF0_0000 (external SRAM). To take over an
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