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MPC566EVB User’s Manual

Connectors and User Components

1.5.5.6 QADC_PORTs

The QADC (Qued Analog to Digital Converter) Ports provide access the MPC566 QADC A and
B channels on to socket headers, QADC_A and QADC_B.

MPWM1

MPWM0

MDA31

MDA30

MDA29

MDA28

MDA27

MDA15

MDA14

MDA13

MDA12

MDA11

The MPC535/6 has limited or no functionality for this module. See Appendix A

QADC_A

SIGNAL

PIN

SIGNAL

VRL

VRH

ETRIG2

ETRIG1

A_PQB7/AN51

A_PQA7/AN59

A_PQB6/AN50

A_PQA6/AN58

A_PQB5/AN49

A_PQA5/AN57

A_PQB4/AN48

A_PQA4/AN56

A_PQB3/AN3

A_PQA3/AN55

A_PQB2/AN2

A_PQA2/AN54

A_PQB1/AN1

A_PQA1/AN53

A_PQB0/AN0

A_PQA0/AN52

QADC_B

SIGNAL

PIN

SIGNAL

AN87

AN86

AN85

AN84

MIOS PORT (Continued)

AUX SIGNAL

SIGNAL

PIN

SIGNAL

AUX SIGNAL

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

Summary of Contents for MPC566EVB

Page 1: ...MPC566EVBUM Rev 1 2 3 2003 MPC566EVB User s Manual Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 2: ...1 1 11 2002 Initial Version 1 2 3 2003 Fixed typos Added appendix describing dBUG ethernet configu ration Added appendix for emulating the MPC53X parts Freescale Semiconductor I Freescale Semiconducto...

Page 3: ...plant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Motorola product could create a situation where personal injury o...

Page 4: ...directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Axiom Manufacturing was negligent regarding the design...

Page 5: ...for class a computing devices pursuant to Subpart J of Part 15 of FCC rules which are designed to provide reasonable protection against such interference Operation of this product in a residential are...

Page 6: ...Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 7: ...Program 1 9 1 3 7 Power Oak K I S Hardware Options 1 10 1 4 Communication Ports 1 11 1 4 1 COM1 COM4 1 11 1 4 2 CAN PORTs and Options 1 13 1 4 3 10 100T Ethernet Port 1 14 1 4 4 BDM and NEXUS Develop...

Page 8: ...iguration Word and Configuration Switch CONFIG_SW 2 8 2 3 2 Memory Configuration MAP_SW 2 10 2 4 System Power up and Initial Operation 2 10 Chapter 3 Using the Monitor Debug Firmware 3 1 What Is dBUG...

Page 9: ...ndix B Configuring dBUG for Network Downloads B 1 Required Network Parameters B 1 B 2 Configuring dBUG Network Parameters B 1 B 3 Troubleshooting Network Problems B 2 Freescale Semiconductor I Freesca...

Page 10: ...Contents Paragraph Number Title Page Number iv MPC564EVB User s Manual MOTOROLA Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 11: ...evice for programming and evaluating the attributes of the micropro cessor To support development and test the evaluation board can be connected to debuggers and emulators produced by different manufa...

Page 12: ...ports with 16 pin socket headers MIOS Port MDA PWM and MGPIO ports with 34 pin socket header TPU Ports1 3 Timing Processor I O ports with 20 pin socket headers QADC Ports1 2 Analog I O ports one 20 pi...

Page 13: ...e to be selected There are regions that can be decoded to allow superviser user instruction and data each to have the 32 bit address range All the processor s signals are available through the expansi...

Page 14: ...ring the first cycle of a burst type access Refer to the specific device data sheet for configuring the flash memory User should note that the debug monitor firmware is installed in this flash device...

Page 15: ...by the dBUG monitor except during system initialization After system initialization is complete the internal memory is available to the user The memory is relocatable to any 32 KByte boundary 1 2 4 In...

Page 16: ...one internal memory bank two external memory banks and a Peripheral memory bank that provide 36KByte Internal SRAM MPC566 512K byte Internal FLASH Memory U1 256K x 32bit 1MByte Synchronous Static RAM...

Page 17: ...guration word IP bit is cleared to 0 or physical address 0xFFF0_0100 if the hard reset configuration word IP bit is set to 1 This requires the board to have a non volatile memory device in this range...

Page 18: ...ue during external RCW word operation The user may apply a wire jumper between the 2 pad positions of each RW0 30 option to provide a logic high level on the respective bit position during external RC...

Page 19: ...priority can result in undefined operation The MPC566EVB hardware uses IRQ 0 SGPIOC 0 to support the ABORT Non Maskable Interrupt function using the ABORT switch SWITCH1 when BRK_EN jumper is inserte...

Page 20: ...the features The options are sorted by leading character to indicate functionality K designated options refer to VKAM and MPC566 back up supply options I designated options refer to Interrupt operati...

Page 21: ...on with an external terminal PC The TERMINAL baud rate defaults to 19200 Notes 1 COM ports provide connection pads 1 9 behind the DB9 cable connectors so the user may modify operation of the serial co...

Page 22: ...l Port Configuration The Axx and Bxx cut away options provide a means of isolating the individual SCI RXD and TXD signals from the RS232 interface translator device U10 and COM port operation This all...

Page 23: ...ation on the MPC566 MGPIO port must be enabled in software see example source code The MPC566 MGPIO Port bits 13 and 14 are effected along with the MPC566EVB MIOS Port pins 32 and 33 respectfully B_EN...

Page 24: ...FF ELF or Image raw binary Refer to Appendix B Configuring dBUG for Network Downloads for details on how to configure the board for network download The Ethernet registers are located at chip select C...

Page 25: ...e kit No special setting is needed Refer to the MPC566 User s Manual BDM Section for additiona instructions The NEXUS interface provides the IEEE ISTO 5001 50 pin standard I O connections and connecto...

Page 26: ...4 4 2 Nexus Connector The 2001 Nexus standard defines several different standards for different speed accesses to a microcontroller in a target system These standards have been revised since that rel...

Page 27: ...VREF VDD2 6 EVTI EVTI IN2 9 10 GND GND RSTI RSTI IN2 11 12 GND GND MSEI MSEI IN2 13 14 GND GND MDI 0 MDI0 IN2 15 16 GND GND MCKI MCKI IN2 17 18 GND GND MDO 0 MDO0 OUT 19 20 GND GND MCKO MCKO OUT 21 2...

Page 28: ...1 MDI 1 L3 MDI2 1 MDI3 1 EVTI EVTI M2 Aux Out Port MCKO MCKO P3 MSEO MSEO T2 MDO0 MDO 0 P4 MDO1 MDO 1 R1 MDO2 MDO 2 R3 MDO3 MDO 3 T1 MDO4 MDO 4 MPIO32B 10 N2 MDO5 MDO 5 MPIO32B 9 N4 MDO6 MDO 6 MPIO32B...

Page 29: ...attach 80 or 160 character display modules and some graphics display modules with embedded controllers Most LCD modules operate very 1 This optional signal is not available on the MPC56x devices 2 Th...

Page 30: ...gned Example source code for the LCD and Keypad drivers are provided on the Axiom MPC5xx support CD The LCD Port is assigned on chip select CS3 if enabled with MAP Switch position 6 Memory map offset...

Page 31: ...an IRQ0 NMI interrupt to occur on SW1 being pressed This feature is provided to support the Monitor ABORT operation to stop user code execution and return to the Monitor command prompt When the optio...

Page 32: ...nected by CUT_AWAY pad E0 This connection is for NEXUS port programming of the MPC566 internal flash This connection will cause the CONFIG_SW position 7 or 8 to enable both signals If this operation i...

Page 33: ...36 35 A8 D31 34 33 D30 D29 32 31 D28 D27 30 29 D26 D25 28 27 D24 D23 26 25 D22 D21 24 23 D20 D19 22 21 D18 D17 20 19 D16 D15 18 17 D14 D13 16 15 D12 D11 14 13 D10 D9 12 11 D8 D7 10 9 D6 D5 8 7 D4 D3...

Page 34: ...35 6 has limited or no functionality for this module See Appendix A TPU PORT SIGNAL PIN PIN SIGNAL GND 20 19 GND 5V 18 17 T2CLK TPU CH15 16 15 TPU CH14 TPU CH13 14 13 TPU CH12 TPU CH11 12 11 TPU CH10...

Page 35: ...3 WE2 8 7 CS2 WE1 6 5 CS1 WE0 4 3 CS0 3 3V 2 1 3 3V MIOS PORT AUX SIGNAL SIGNAL PIN PIN SIGNAL AUX SIGNAL MGPIO15 34 33 MGPIO14 CAN_C RX CAN_C TX MGPIO13 32 31 MGPIO12 MGPIO11 30 29 MGPIO10 NEXUS MDO_...

Page 36: ...or this module See Appendix A QADC_A SIGNAL PIN PIN SIGNAL VRL 20 19 VRH ETRIG2 18 17 ETRIG1 A_PQB7 AN51 16 15 A_PQA7 AN59 A_PQB6 AN50 14 13 A_PQA6 AN58 A_PQB5 AN49 12 11 A_PQA5 AN57 A_PQB4 AN48 10 9...

Page 37: ...ypad 14 13 B_PQA6 AN58 Keypad B_PQB5 AN49 keypad 12 11 B_PQA5 AN57 Keypad B_PQB4 AN48 Keypad 10 9 B_PQA4 AN56 Keypad B_PQB3 AN3 8 7 B_PQA3 AN55 B_PQB2 AN2 6 5 B_PQA2 AN54 B_PQB1 AN1 4 3 B_PQA1 AN53 B_...

Page 38: ...PC566 device user guide 1 7 Software Development The provided dBUG monitor utility software initializes the clock to run this board at 56 MHz on power up The user can set this by changing the PLL Regi...

Page 39: ...pability The development environment and procedure for best success is to place software to be tested into RAM memory Execute software to be tested under Monitor or development tool control then progr...

Page 40: ...1 30 MPC566EVB User s Manual Software Development Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 41: ...nimum system configuration The MPC566EVB board provided Power supply provided RS232 compatible terminal or a PC with terminal emulation software RS232 Communication cable provided Figure 2 1 displays...

Page 42: ...l System Configuration Figure 2 1 Minimum System Configuration 6 26 V Input Power dBUG RS 232 Terminal Or PC Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product...

Page 43: ...DE software and GNU compiler 25 pin parallel cable DB32 M F for BDM A selection of demo Third Party Developer Tools and Literature NOTE Avoid touching the MOS devices Static discharge can and will dam...

Page 44: ...software control via the MPC566 QSPI port to modify the Power Oak application The Power Port provides tap points for the power supplies and switched power outputs from the Power Oak Following is the...

Page 45: ...Format The character format of the communication channel is fixed at power up or RESET The default character format is 8 bits per character no parity and one stop bit with no flow control It is necce...

Page 46: ...plied to the board Figure 2 2 Pin assignment for female Terminal connector Pin assignments are as follows Pin 1 4 and 6 group connected for DTR DSR flow control null back to host Pin 2 TXD output RS23...

Page 47: ...4 2 CAN PORTs and Options C_RX inserted CAN see Section 1 4 2 CAN PORTs and Options removed CAN see Section 1 4 2 CAN PORTs and Options 100_IRQ inserted Ties the interrupt line from the Ethernet chip...

Page 48: ...ides several key external Reset Configuration Word RCW options and the programming enable options for programming the MPC566 internal flash memory These switches provide a logic 0 or low level when of...

Page 49: ...nction 1 CFG_EN RST_CONF Enable External Config This bit enables the external reset config 0 Internal Reset Config Word se lected 1 External Reset Config Word se lected default 2 CFG1 BDIS Data Bus 3...

Page 50: ...d whether the internal flash is enabled I 2 4 System Power up and Initial Operation When all of the cables are connected to the board power may be applied The dBUG ROM Monitor initializes the board an...

Page 51: ...s connected to the board 2 Check that the terminal and board are set for the same character format and baud 3 Check that your switches are set to their default settings 4 Press the RESET button to ins...

Page 52: ...2 12 MPC566EVB User s Manual System Power up and Initial Operation Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 53: ...through pre defined commands that are entered via the terminal These commands are defined in Section 3 4 Commands The user interface to dBUG is the command line A number of features have been impleme...

Page 54: ...under control of the dBUG firmware and after command completion the system returns to command entry mode During command execution additional user input may be required depending on the command functio...

Page 55: ...sure the IP bit is set switch 5 ON in MAP_SW This will cause the board to boot out of external flash where the dBUG code resides Turn power on to the board Freescale Semiconductor I Freescale Semicond...

Page 56: ...up the board will initialize the system The processor is reset and dBUG is invoked dBUG performs the following configurations of internal resources during the initialization The IP bit is set by defau...

Page 57: ...mware Pressing the RESET button would be the appropriate action if all else fails 3 2 2 2 Non Maskable Interrupt Button SWITCH1 can be used as a non maskable interrupt button It is available for the u...

Page 58: ...ommands may be entered either in uppercase or lowercase depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by usin...

Page 59: ...width begin end Memory Display MM mm width addr data Memory Modify MMAP mmap Memory Map Display RD rd reg Register Display RM rm reg data Register Modify RESET reset Reset SD sd Stack Dump SET set opt...

Page 60: ...is placed into memory and the address incremented accordingly If the assembly is not valid then memory is not modified and an error message produced In either case memory is disassembled and the proc...

Page 61: ...h is displayed The value for addresses addr1 and addr2 may be an absolute address specified as a hexadecimal value or a symbol name The value for length may be a symbol name or a number converted acco...

Page 62: ...ddress for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples...

Page 63: ...names If the destination address overlaps the block defined by begin and end an error message is produced and the command exits Examples To copy a block of memory starting at 0xFFF4_0000 and ending a...

Page 64: ...the execution of target code the count value is compared against the trigger value If the count value is equal to or greater than the trigger value a breakpoint is encountered and control returned to...

Page 65: ...hus for the duration of the operation this command performs properly aligned memory accesses Examples To search for the 32 bit value 0x1234_5678 in the memory block starting at 0xFFF4_0000 and ending...

Page 66: ...into the DC command is prefixed by 0x then data is interpreted as a hexadecimal value Otherwise data is interpreted as a decimal value All values are treated as 32 bit quantities Examples To display t...

Page 67: ...is especially useful for branch target addresses and subroutine calls The DI command attempts to track the address of the last disassembled opcode If no address is provided to the DI command then the...

Page 68: ...ination is an address outside the defined user space then an error message is displayed and downloading aborted DL can be used for downloading to internal flash external flash internal SRAM and extern...

Page 69: ...e serial port Upon asking if the user is sure they want to do this the user should respond by typing yes if they want to continue The DLDBUG command will work at baud rates up to and including 57600 X...

Page 70: ...s are manipulated using the SET and SHOW commands The DN command checks the destination download address for validity If the destination is an address outside the defined user space then an error mess...

Page 71: ...t The destination address must be word 4byte aligned and the byte count must be in word 4byte multiples To download a s19 file straight to flash please see the DL command Examples To view the flash de...

Page 72: ...inserted into the target code and the context is switched to the target program Control is only regained when the target code encounters a breakpoint illegal instruction or other exception which caus...

Page 73: ...r a symbol name When the GT command is executed all breakpoints are inserted into the target code and the context is switched to the target program Control is only regained when the target code encoun...

Page 74: ...may start is given If command is provided then a brief listing of the syntax of the specified command is displayed Examples To obtain a listing of all the commands available within dBUG the command i...

Page 75: ...ocated and register refers to the specific register to display The registers are organized according to the module to which they belong The available modules on the MPC500 are USIU TPU_A TPU_B QADC_A...

Page 76: ...eter specifies the new value to be written into the register The registers are organized according to the module to which they belong The available modules on the MPC500 are USIU TPU_A TPU_B QADC_A QA...

Page 77: ...pressed The optional width specifies the size of the data to be read If no width is specified the command defaults to reading word sized data Example To continually read the word data from address 0x...

Page 78: ...f the access to memory The default access size is a word Examples To continually write the data 0x1234_5678 to address 0xFFF2_0000 the command is lw FFF20000 12345678 Note that the following command w...

Page 79: ...MD will display memory up to an address that is 128 beyond the starting address This command first aligns the starting address for the data access size and then increments the address accordingly dur...

Page 80: ...then the MM command enters into a loop The loop obtains a value for data sets the contents of the current address to data increments the address according to the data size and repeats The loop termin...

Page 81: ...also includes information on how the Chip selects are used on the board Here is an example of the output from this command Type Start End ISB 0x00000000 0x003FFFFF Internal SRAM 0x003F8000 0x003FFFFF...

Page 82: ...the command is rd To display only the program counter rd pc Here is an example of the output from this command pc FFF08000 msr 00009042 EE ME IP RI cr 00000000 xer 00000000 lr 00000000 ctr 00000000 r...

Page 83: ...the user defined radix normally hexadecimal dBUG preserves the registers by storing a copy of the register set in a buffer The RM command updates the copy of the register in the buffer The actual valu...

Page 84: ...executes the same sequence of code that occurs at power on If the RESET command fails to reset the system adequately cycle the power or press the reset button Examples To reset the board and clear the...

Page 85: ...er This is the network IP address of the machine which contains files accessible via TFTP Your local network administrator will have this information and can assist in properly configuring a TFTP serv...

Page 86: ...tions and settings the command is show To display the current baud rate of the board the command is show baud Here is an example of the output from a show command dBUG show base 16 baud 19200 server 1...

Page 87: ...This command only works when executing code in SRAM The STEP command can be used to step over BSR and JSR instructions The STEP command will work for other instructions as well but note that if the S...

Page 88: ...information for the symbol table Symbol names contained in the symbol table are truncated to 31 characters Any symbol table lookups either by the SYMBOL command or by the disassembler will only use t...

Page 89: ...d sets bits in the processors supervisor registers to achieve single instruction execution and the target code executed Control returns to dBUG after a single instruction execution of the target code...

Page 90: ...ecimal for example v 2b 1c 1a The version date is the day and time at which the entire dBUG monitor was compiled and built Examples To display the version of the dBUG monitor the command is version In...

Page 91: ...prg1 contains LR 3 5 1 OUT_CHAR This function function code 0x0020 sends a character which is in r3 to terminal The system call interface accepts an opcode in r10 to indicate which operation is to be...

Page 92: ...STER This function s code is 0x0040 For ISR_REGISTER the vector handler device ptr and arg ptr are in r3 r4 r5 and r6 respectively C example int board_isr_register int vector void handler void device...

Page 93: ...This function transfers the control back to the dBUG by terminating the user code The register context is preserved C example see scif s file anything in R10 besides 0x0000 0x0001 0x0020 0x0030 0x0031...

Page 94: ...3 42 MPC564EVB User s Manual System Call Functions Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

Page 95: ...lists Figure A 1shows the block diagram of the MPC535 6 Table A 1 Module Differences of MPC566 MPC535 and MPC536 Module MPC566 MPC535 MPC536 Core Speed 40 or 56MHz 40MHz 40MHz Termperature Range 40o C...

Page 96: ...I F UIMB QSMCM MIOS14 Nexus JTAG QADC64E QSMCM J1850 32K CALRAM_A 4 Kbyte Overlay 4 Kbyte CALRAM_B 4 Kbyte Overlay Tou CAN Tou CAN w AMUX QADC64E w AMUX Buffer Burst Controller 2 DECRAM 4Kbytes 28 Kby...

Page 97: ...y for non local traffic gateway IP and Network netmask for flagging traffic as local or non local netmask In addition the dBUG network download command requires the following three parameters IP addre...

Page 98: ...erver A default filename for network downloads is maintained by dBUG To change the default filename use the command set filename filename When using the Ethernet network for download either S record C...

Page 99: ...execute a command named tftp which can be used to connect to the TFTP server as well Is the default TFTP root directory present and readable If ICMP_DESTINATION_UNREACHABLE or similar ICMP message ap...

Page 100: ...B 4 MPC564EVB User s Manual Troubleshooting Network Problems Freescale Semiconductor I Freescale Semiconductor Inc For More Information On This Product Go to www freescale com nc...

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