Chapter 1 Device Overview MC9S12ZVHY/MC9S12ZVHL Families
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
58
Freescale Semiconductor
1.9
Modes of Operation
The MCU can operate in different modes. These are described in
1.9.1 Chip Configuration Modes
The MCU can operate in different power modes to facilitate power saving when full system performance
is not required. These are described in
.
Some modules feature a software programmable option to freeze the module status whilst the background
debug module is active to facilitate debugging. This is referred to as freeze mode at module level.
1.9.1
Chip Configuration Modes
The different modes and the security state of the MCU affect the debug features (enabled or disabled).
The operating mode out of reset is determined by the state of the MODC signal during reset (
).
The MODC bit in the MODE register shows the current operating mode and provides limited mode
switching during operation. The state of the MODC signal is latched into this bit on the rising edge of
RESET
1.9.1.1
Normal Single-Chip Mode
This mode is intended for normal device operation. The opcode from the on-chip memory is being
executed after reset (requires the reset vector to be programmed correctly). The processor program is
executed from internal memory.
143
100
PG4
FP28
—
—
—
—
VDDX
PERG/
PPSG
Pull
Down
144
1
PG3
FP27
—
—
—
—
VDDX
PERG/
PPSG
Pull
Down
1. NC on ZVHY, don’t connect to VDD/VSS
2. Pin not avaiable on ZVHY
3. Function not avaiable on ZVHY
Table 1-8. Chip Modes
Chip Modes
MODC
Normal single chip
1
Special single chip
0
Table 1-7. Pin Summary
LQFP
Option
Function
Power
Supply
Internal Pull
Resistor
144
100 Pin
1st
Func.
2nd
Func.
3rd
Func.
4th
Func.
5th
Func.
CTRL
Reset
State