Chapter 12 Serial Communication Interface (S12SCIV6)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
495
12.4.4
Baud Rate Generation
A 16-bit modulus counter in the two baud rate generator derives the baud rate for both the receiver and the
transmitter. The value from 0 to 65535 written to the SBR15:SBR0 bits determines the baud rate. The value
from 0 to 4095 written to the SBR15:SBR4 bits determines the baud rate clock with SBR3:SBR0 for fine
adjust. The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL) for both transmit and
receive baud generator. The baud rate clock is synchronized with the bus clock and drives the receiver. The
baud rate clock divided by 16 drives the transmitter. The receiver has an acquisition rate of 16 samples per
bit time.
Baud rate generation is subject to one source of error:
•
Integer division of the bus clock may not give the exact target frequency.
lists some examples of achieving target baud rates with a bus clock frequency of 25 MHz.
When IREN = 0 then,
SCI baud rate = SCI bus clock / (SCIBR[15:0])
1. The address bit identifies the frame as an address
character. See
Section 12.4.6.6, “Receiver Wakeup”
.
Table 12-16. Baud Rates (Example: Bus Clock = 25 MHz)
Bits
SBR[15:0]
Receiver
(1)
Clock (Hz)
1. 16x faster then baud rate
Transmitter
(2)
Clock (Hz)
2. divide 1/16 form transmit baud generator
Target
Baud Rate
Error
(%)
109
3669724.8
229,357.8
230,400
.452
217
1843318.0
115,207.4
115,200
.006
651
614439.3
38,402.5
38,400
.006
1302
307219.7
19,201.2
19,200
.006
2604
153,609.8
9600.6
9,600
.006
5208
76,804.9
4800.3
4,800
.006
10417
38,398.8
2399.9
2,400
.003
20833
19,200.3
1200.02
1,200
.00
41667
9599.9
600.0
600
.00
65535
6103.6
381.5