Port F
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
111
Figure 10-18
shows the port F I/O logic.
Figure 10-18. Port F I/O Circuit
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 10-
6
summarizes the operation of the port F pins.
Table 10-6. Port F Pin Functions
DDRF Bit
PTF Bit
I/O Pin Mode
Accesses to DDRF
Accesses to PTF
Read/Write
Read
Write
0
X
(1)
1. X = don’t care
Input, Hi-Z
(2)
2. Hi-Z = high impedance
DDRF[6:0]
Pin
PTF[6:0]
(3)
3. Writing affects data register, but does not affect input.
1
X
Output
DDRF[6:0]
PTF[6:0]
PTF[6:0]
READ DDRF ($000D)
WRITE DDRF ($000D)
RESET
WRITE PTF ($0009)
READ PTF ($0009)
PTFx
DDRFx
PTFx
INTERNAL
DAT
A BU
S
