Freescale Semiconductor 56F803, User Manual

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Datasheet of DSP56F803EVM - KIT EVALUATION FOR DSP56F803
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56F803EVM Schematics, Rev. 5
Freescale Semiconductor Appendix A-13
Figure
A
-1
2
.
Pa
rall
el
JTAG Host/Ta
rget Interfa
ce
and J
T
A
G
Conn
e
c
tor
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Parallel JTAG Interface
KEY
JTAG Connector
On-Board Host Target Interface Disable
DSP /RES
E
T
DSP /JTAG-
RESET
On-Board Host Target Interface Power Source
PARALLEL JTAG HOST TARGET INTERFAC
E AND JTAG CONNECTOR
B
DSP56803
EVM.DSN
Monday, June
22, 1998
Development
Tools
14
12
1.3
Wireless Subscriber Divisi
on
6501
William Cannon Drive West
Austin, TX
, 78735-8598
(512)895-3230 FAX: (512)895-4556
MD:OE314
Title
Size
Docu
ment
Nu
mber
Date
:
Design
er:
Re
v.
Shee
t
of
PORT_TDO PORT_CONNECT PORT_RESET PORT_TMS PORT_TCK
PORT_IDENT
PORT_TDI /PORT_TRST
/RESET
TDO TMS TCK TDI P_RESET /TRST
P_RESET
/TRST TDO
PORT_VCC
TMS
TCK
TDI
TDO
/RESET
/TRST
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
P2
DB25M
1 3 2
15 14 16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
J1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
R3 51 R4 51
U7
MC74HC244DW
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
2G
19
1G
1
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
VCC
20
GND
10
U6 MC74HC244DW
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
2G
19
1G
1
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
VCC
20
GND
10
R2 5.1K
R7
5.1K
R6 5.1K
R5 5.1K
R8 10K
Q1 2N2222/TO
R60 5.1K
JG8
1
2
3
C3
0.1uF
R65 5.1K
R63 5.1K
R62 5.1K
R64 5.1K
JG2
1 2
TP46
1
TP47
1
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