Fluke 9000A-006, Service Manual, Page: 25 / 64

2-11
9000A-006 Service
FIGURE 2-4. CRC Section, Block Diagram
Events Section 2-8.
The events section contains a 24-bit binary counter that consists of six 4-bit registers, U57
through U62. Each register has four-bit parallel inputs and outputs, where the output of the
first is connected to the input of the second, etc. As in the CRC register, this arrangement
allows data to be shifted through the registers in four-bit parallel fashion. The four-bit
parallel output of the sixth register is fed to the parallel input of the CRC register,
providing a means for the event count data to be shifted through to the transmit buffer, U3,
located in the control section.
As shown in Figure 2-5, the input to the counter is selected from GATED-CLK, EDGED-
CLK, GATED-HI, or VALID-HI by l-of-4 selector, U19. The selected input to the counter
is determined by the EVENT-GATED-FREE and EVENT-CLK- HI signals from the
control section. The EVENT-GATED-FREE signal causes U19 to select between
EDGED-CLK or VALID-HI and GATED-CLK or GATED-HI. The EVENT-CLK-HI
signal causes U19 to select between GATED-CLK or EDGED- CLK and GATED-HI or
VALID-HI.
The events counter, U57 through U62, counts up using the selected input to clock the first
stage.