
9000A-006 Service
2-8
Gate Section
2-6.
The main function of the gate section is to provide gated CLOCK pulses, using the
START, STOP, CLOCK, ENABLE, and pod SYNC signals, as selected by the operator of
the Troubleshooter. The gated CLOCK signals are required by the CRC section to clock in
the data appearing at the data probe and to calculate the signature of the data occurring
during the gate time. (The gate time is that period between the first selected START edge
and the first STOP edge.) The gate section also provides an output (GATE-ON) to the
events section so that events can be counted during the gate time (when not operated in the
free-running mode).
When the setup of the Troubleshooter is performed (see Section 3), selections regarding
the control (START, STOP, CLOCK, and ENABLE) signals are made and stored within
the Troubleshooter. When the operator presses the READ PROBE key to read a signature,
events count, or waveform, the Troubleshooter sends the control signal selections made
during setup to the Signature Module. The setup selections are sent as op codes, decoded
within the control section and applied to the gate section as individual control lines.
Figure 2-3 shows each of the control lines from the control section, plus the control signals
themselves from the Clock Module and Interface Pod (pod SYNC). The control signal
source selector (U34 and U35) permits selection of the source for the START, STOP,
CLOCK, and ENABLE signals. The source for the START signal may be the start lead of
the Clock Module (EXT-START) or the pod SYNC signal. The source for the STOP signal
may be either the stop lead (EXT-STOP) or the SYNC signal from the Interface Pod. The
source for the CLOCK signal may be the clock lead (EXT-CLOCK) of the Clock Module
or the pod SYNC signal.The source for the ENABLE signal may be the enable lead (EXT-
ENAB) of the Clock pod or the logic high (always enabled).
The control signal sources are selected by the four control lines designated START-
SOURCE, STOP-SOURCE, ENAB-SOURCE, and CLOCK-SOURCE from the control
section. The four control lines reflect the op codes sent by the Troubleshooter to initialize
the Signature Module prior to taking a signature, and cause the selector (U34 and U35) to
connect the appropriate signal source through to its output. At the output, the selected
control signals are applied to the control signal edge selector.
The edge selector (U36) allows selection of the rising or falling edge of each of the
selected control signals. (The ENABLE signal is selected as a level since it is not edge-
sensitive.) The edges are selected by the control lines designated START-EDGE, STOP-
EDGE, CLK-EDGE, DBL-CLK, and ENAB-LEVEL.
The CLK-EDGE and DBL-CLK control lines are applied to selector U25 along with the
SELECTED-CLK signal. Selector U25 causes U36 to output CLOCK pulses at a rate of
one per selected edge, or one per edge (both edges), depending on the control lines from
the control section. In the one-per edge mode, the selected CLOCK signal is doubled,
since a CLOCK pulse is provided at the output of U36 for each CLOCK signal edge, both
rising and falling.
Operation of the gate section from this point is such that when a selected START edge
occurs, the start flip-flop (U48A) is clocked. If the start flip-flop was previously armed (by
the ARMED control line and the arm op code), it changes state to produce the START-
RECVD signal. The START-RECVD signal is fed to the enable gate (U49), to the stop
flip/flop (U48B), and back to the control section as a status line to the Troubleshooter.
Summary of Contents for 9000A-006
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