FIC MB05W Service Manual
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FIC MB05 Service Manual
receive FIFOs of 3 kB each help prevent data underruns and overruns while waiting for bus
accesses. This enables the integrated LAN Controller to transmit data with minimum
interframe spacing (IFS).
The LAN Controller can operate in either full duplex or half duplex mode. In full duplex mode
the LAN Controller adheres with the IEEE 802.3x Flow Control specification. Half duplex
performance is enhanced by a proprietary collision reduction mechanism. See Section 5.2,
“
LAN Controller (B1:D8:F0)
”
on page 5-78 for details.
RTC
The ICH4 contains a Motorola* MC146818A-compatible real-time clock with 256 bytes of
battery-backed RAM. The real-time clock performs two key functions: keeping track of the
time of day and storing system data, even when the system is powered down. The RTC
operates on a 32.768 KHz crystal and a separate 3-V lithium battery that provides up to seven
years of protection.
The RTC also supports two lockable memory ranges. By setting bits in the configuration
space, two 8-byte ranges can be locked to read and write accesses. This prevents
unauthorized reading of passwords or other system security information.
The RTC also supports a date alarm that allows for scheduling a wake up event up to 30 days
in advance, rather than just 24 hours in advance.
4.6
Clock Frequency Generator
The notebook utilizes the IMI CY28346 chip to supply the system clock needed to run the
computer. The following are the available clock frequencies:
System clock:
Clock generator IMI CY28346 support:
-
66/100 MHz for Pentium III Mobile CPU
-
30/33 MHz for PCI device bus clock use
-
48 MHz for PIIX4M
-
14.318 MHz for PIIX4M refresh use
•
14.318 MHz XTAL for Clock Generator use
•
32.768 KHz XTAL for RTC real time clock
•
8.0 MHz XTAL for K/B controller use
•
14.318 MHz OSC for sound blaster use
4.7
Cache Memory
The primary (L1) and secondary (L2) level cache are integrated on the CPU. By incorporating
the cache on-die (meaning it is combined with the CPU into one component), Intel eliminates
the need for separate components. The 512KB on-die L2 cache provides three (3X) times
faster processor access, resulting in significant improvements in performance. Likewise, an
integrated cache means a reduction of connections resulting in increased reliability.
4.8
System Memory
The memory subsystem, implemented on the motherboard, includes System and Video
memory. The Intel 855GM System Controller chip provides primary control for the system
memory.
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