46
0x50 Block Erase
0x82 Main memory page program through buffer 1
0x85 Main memory page program through buffer 2
The following non-write commands are also implemented with Write Flash:
0x53
Main memory Page to Buffer 1 Transfer
0x55
Main memory Page to Buffer 2 Transfer
0x60
Main memory Page to Buffer 1 Compare
0x61
Main memory Page to Buffer 2 Compare
0x58
Auto Page Rewrite through Buffer 1
0x59
Auto Page Rewrite through Buffer 2
The camera responds with "L" followed by a carriage-return. Internally the Control FPGA
waits for the flash to become non-busy then starts the flash write operation. It does not
wait for the flash to complete it (become not busy) after starting the command.
Subsequent flash operations check the busy state of the flash memory, allowing overlap of
serial communication and flash programming. Theoretically a flash write command without
initial wait could give even more overlap by allowing write to a non-busy buffer while a
previous write is ongoing, but in practice the flash page write timing is shorter than the
serial transmission time to send the command. At 115,200 baud it takes about 46 msec to
send 528 bytes. The flash page erase/write cycle is only 20 msec max.
R
EAD
F
LASH
This command takes arguments that form the precise command to send to the flash
memory followed by the command length and data length to be read in bytes. Command
length includes any "don't care" bytes required by the flash command selected. Data
length is limited by the flash page buffer size for most commands, but can be as large as