User Guide — EP9134_UG V0.7
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28
3.3.1.19 RX_KSV_FIFO Registers ($80 ~ $CF)
These 80-bytes registers are write only. The value writes to this register can be read by the upstream source
through the DDC link while the HDCP is invoked.
The MCU shall write 0x00 to these registers to be the
default values. Each KSV list contains 5 bytes registers and the register structure is shown below.
Table 3-21 KSV_FIFO Registers
Address
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
reset
0x80 + 5 * (X-1)
KSVx[7:0]
xxh
0x81 + 5 * (X-1)
KSVx[15:8]
xxh
0x82 + 5 * (X-1)
KSVx[23:16]
xxh
0x83 + 5 * (X-1)
KSVx[31:24]
xxh
0x84 + 5 * (X-1)
KSVx[39:32]
xxh
NOTE: X = downstream device count
0x6D
RX_SHA-1_HASH_13
xxh
0x6E
RX_SHA-1_HASH_14
xxh
0x6F
RX_SHA-1_HASH_15
xxh
0x70
RX_SHA-1_HASH_16
xxh
0x71
RX_SHA-1_HASH_17
xxh
0x72
RX_SHA-1_HASH_18
xxh
0x73
RX_SHA-1_HASH_19
xxh
Table 3-20 HDCP SHA-1 Hash Value Registers
Address
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
reset
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