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Programming
3
Programming
3.1 I/O Port Address
The PCL-726 requires 16 consecutive addresses in the PC
5
s I/O
address space. The starting address (Base) is selected on the DIP
switch SW1 ( see Section 2.5). The following table (Table 4.1) shows
the location of each register and its description.
Location
Mode
Description
Base + 0
Write
D/A #1 high byte data
Base + 1
Write
D/A #1 low byte data
Base + 2
Write
D/A #2 high byte data
Base + 3
Write
D/A #2 low byte data
Base + 4
Write
D/A #3 high byte data
Base + 5
Write
D/A #3 low byte data
Base + 6
Write
D/A #4 high byte data
Base + 7
Write
D/A #4 low byte data
Base + 8
Write
D/A #5 high byte data
Base + 9
Write
D/A #5 low byte data
Base + 10
Write
D/A #6 high byte data
Base + 11
Write
D/A #6 low byte data
Base + 12
Write
D/O Bit 8-15
Base + 13
Write
D/O Bit 0-7
Base + 14
Read
D/I Bit 8-15
Base + 15
Read
D/I Bit 0-7
Table 4.1
Summary of Contents for PCL-726
Page 1: ...PCL 726 6 Channel D A Output Card ...
Page 4: ......
Page 6: ......
Page 13: ...Installation 7 2 3 PCL 726 s Layout Figure 2 1 PCL 726 s Layout ...
Page 20: ...14 Installation ...