570FEC-HW-X19
Bulk 10GE FEC Encode/Decode
Revision 1.0
Page - 5
3.
SPECIFICATIONS
3.1.
INPUTS AND OUTPUTS
Bi-directional Mode
64x IP inputs to allow for 32x processing paths of FEC insertion
32x IP outputs with FEC insertion
FEC insertion Mode
96x IP outputs with FEC insertion***
FEC Correction Mode
192x IP inputs to allow for 96 processing paths of FEC correction***
SFP Ports used
SFP 1-4
3.2.
SFP MODULES
4xSFP modules
RTP headers can be enabled or disabled for FEC correct paths
3.3.
FEC INSERTION PARAMETERS
FEC encoding (Pro MPEG forum code of practice #3 release 2<cop3>) with L&D following the below
range: