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3.8. TTL Input/Output (Version 1)

Applies to:

TTL Input/Output Simplified schematic

The port implements a 3.3 V LVTTL driver and a 5 V-compliant 3.3 V LVTTL receiver.

Coaxlink

Hardware Manual

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Summary of Contents for Coaxlink 1629

Page 1: ... Duo PCIe 104 MIL 3300 HD26F I O module for Coaxlink Duo PCIe 104 3301 Thermal drain Model 1 for Coaxlink Duo PCIe 104 3302 DIN1 0 2 3 Coaxial cable for Coaxlink Duo PCIe 104 HARDWARE MANUAL EURESYS s a 2020 Document D206ET Coaxlink PCIe104 Hardware Manual eGrabber 14 0 1 2121 built on 2020 11 05 ...

Page 2: ...2 This documentation is provided with Coaxlink 14 0 1 doc build 2121 www euresys com Coaxlink Hardware Manual ...

Page 3: ...r Distribution Schemes 33 3 4 PCI Express Power 38 3 5 Camera Power Input 39 3 6 I O Power Output 40 3 7 Differential Input 41 3 8 TTL Input Output Version 1 43 3 9 TTL 5 V CMOS and LVTTL Levels 46 3 10 Isolated Input 47 3 11 Isolated Output 49 4 Environmental Specification 51 4 1 Environmental Conditions 52 4 2 Temperature Monitor 53 4 3 Thermal Data 55 4 4 Compliances 56 5 Related Products Acces...

Page 4: ...4 1 About This Document 1 1 Document Scope 5 Coaxlink Hardware Manual ...

Page 5: ...tles of card specific content Related accessory products Product S N Prefix Icon 3300 HD26F I O module for Coaxlink Duo PCIe 104 KDM 3301 Thermal drain Model 1 for Coaxlink Duo PCIe 104 3302 DIN1 0 2 3 Coaxial cable for Coaxlink Duo PCIe 104 The S N prefix is a 3 letter string at the beginning of the card serial number Icons are used in this document for tagging titles of card specific content NOT...

Page 6: ...ictures physical dimensions connectors description and pin assignments LEDs description switches description etc 2 1 Board and Bracket Layouts 7 2 2 Connectors 9 2 3 LEDs 17 2 4 Firmware Recovery Switch 24 2 5 Physical Characteristics 25 2 6 PCIe 104 Stacking Rules 26 Coaxlink Hardware Manual ...

Page 7: ...7 2 1 Board and Bracket Layouts Coaxlink Hardware Manual ...

Page 8: ... PCIe 104 MIL CoaXPress Host A Connector on page 11 CoaXPress Host B Connector on page 12 C2C Link Connector on page 15 12 V LED on page 21 Board Status LED on page 22 FPGA Status LED on page 23 Firmware Recovery Switch on page 24 Coaxlink Hardware Manual ...

Page 9: ...9 2 2 Connectors Coaxlink Hardware Manual ...

Page 10: ... Host Type 2 x DIN 1 0 2 3 75 Ohms coaxial receptacles Location Module to chassis coaxial cables Usage CoaXPress Host Interface Pin assignments Pin Signal Usage Inner1 CXP_A CoaXPress Host Connection A Outer1 GND Ground Inner2 CXP_B CoaXPress Host Connection B Outer2 GND Ground Coaxlink Hardware Manual ...

Page 11: ...ion Property Value Name CoaXPress Host A Type MCX 75 Ohms coaxial female receptacle Location Printed circuit board Usage CoaXPress Host Interface Pin assignments Pin Signal Usage Inner CXP_A CoaXPress Host Connection A Outer GND Ground Coaxlink Hardware Manual ...

Page 12: ...ion Property Value Name CoaXPress Host B Type MCX 75 Ohms coaxial female receptacle Location Printed circuit board Usage CoaXPress Host Interface Pin assignments Pin Signal Usage Inner CXP_B CoaXPress Host Connection B Outer GND Ground Coaxlink Hardware Manual ...

Page 13: ... 12 Positive pole 3 IIN11 Isolated input 11 Positive pole 4 IIN13 Isolated input 13 Negative pole 5 IIN14 Isolated input 14 Negative pole 6 IOUT12 Isolated contact output 12 Negative pole 7 GND Ground 8 Not connected 9 GND Ground 10 GND Ground 11 DIN12 High speed differential input 12 Negative pole 12 IIN11 Isolated input 11 Negative pole 13 IIN12 Isolated input 12 Positive pole 14 IIN13 Isolated ...

Page 14: ...eed differential input 11 Negative pole 20 DIN11 High speed differential input 11 Positive pole 21 IIN12 Isolated input 12 Negative pole 22 IOUT11 Isolated contact output 11 Negative pole 23 IOUT11 Isolated contact output 11 Positive pole 24 GND Ground 25 TTLIO11 TTL input output 11 26 12V 12 V Power output Coaxlink Hardware Manual ...

Page 15: ...der with shrouding Location Printed circuit board Usage Card to card link Pin assignments Pin Signal Usage 1 GND Ground 2 CSync1 Card to card synchronization bus Signal 1 3 GND Ground 4 CSync2 Card to card synchronization bus Signal 2 5 GND Ground 6 CSync3 Card to card synchronization bus Signal 3 Coaxlink Hardware Manual ...

Page 16: ...operty Value Name Camera Power Input Type 4 pin 0 1 in Molex KK 7478 male connector Location Printed circuit board Usage DC power input for PoCXP Pin assignments Pin Signal Usage 1 GND Ground 2 24V0 24 VDC input 3 24V0 24 VDC input 4 GND Ground Coaxlink Hardware Manual ...

Page 17: ...17 2 3 LEDs Coaxlink Hardware Manual ...

Page 18: ... to Standard default value the lamps indicate the state of the CoaXPress Link connection When set to Dark all lamps are turned off When set to Error all lamps are turned off unless error conditions are detected When set to Custom all lamps are controlled by LampCustomValue a bitfield where each bit is mapped onto a lamp with 1 for orange and 0 for off by the LampCustomLedA LampCustomLedH boolean f...

Page 19: ...onnected but no data being transferred Flash_1 orange Device Host connected waiting for event e g trigger exposure pulse Flash_12_5 green Device Host connected data being transferred 500 ms red pulse3 Error during data transfer e g CRC error single bit error detected AlternateFlash_0_5 green orange Connection test packets being sent Flash_12_5 red System error e g internal error 1Shown for a minim...

Page 20: ... 1 Hz 20 200 milliseconds on 800 milliseconds off Flash_0_5 0 5 Hz 50 1 second on 1 second off AlternateFlash_12_5 12 5 Hz 25 20 milliseconds on color 1 60 milliseconds off 20 milliseconds on color 2 60 milliseconds off AlternateFlash_0_5 0 5 Hz 50 1 second on color 1 1 second off 1 second on color 2 1 second off Coaxlink Hardware Manual ...

Page 21: ...ates LED state Symbol Meaning Off No 12 V power Possible causes are There is no power delivered on the 12 V rail of the PCIe 104 connector The 12 V fuse is blown on the card Solid green 12 V power OK Coaxlink Hardware Manual ...

Page 22: ...istribution network is operational and the FPGA start up procedure has successfully completed Solid red Board status NOK Possible causes are There is no power delivered on the 12 V rail of the PCI Express connector slot At least one power converter of the main power distribution network is unable to operate properly This might be caused by excessive temperature due to inadequate board cooling acci...

Page 23: ... memory are operating normally Solid red FPGA status NOK Possible causes are At least one FPGA clock network is not operating normally This might be caused by excessive jitter on external clock signals of the CoaXPress or the PCI Express interfaces The DDR memory controller has not been able to successfully perform the calibration procedure Coaxlink Hardware Manual ...

Page 24: ...am the FPGA After FPGA startup completion the card exhibits the standard PCI ID and the driver allows normal operation This is the factory default jumper position Recovery position At the next power ON the last but one firmware successfully written into the Flash EEPROM is used to program the FPGA After FPGA startup completion the card exhibits the recovery PCI ID and the driver inhibits image acq...

Page 25: ...axlink Duo PCIe 104 86 8 mm 3 42 in 60 mm 2 36 in 75 g 2 65 oz Cable length Product Item Length 3300 HD26F I O module for Coaxlink Duo PCIe 104 Cable 254 mm 10 in 3302 DIN1 0 2 3 Coaxial cable for Coaxlink Duo PCIe 104 200 mm 7 9 in 3D CAD models 3D CAD models are available on request for the following assemblies Assembly File formats 1629 Coaxlink Duo PCIe 104 EMB DWF STP 1629 Coaxlink Duo PCIe 1...

Page 26: ... providing four active lanes Type 1 PCIe 104 with 1 PCI Express x16 link configured to operate as 2 x8 links providing at least four active lanes per link NOTE According the PCIe 104 specification a Type 1 PCIe 104 host PC that supports a PCIe x16 link is not required to support two x8 or two x4 links For such PCs only one module can be stacked underneath PCIe 104 stack with a Type 1 Host PC and 2...

Page 27: ...he next module the 4 unused PCI Express x1 links Shifts by 8 positions and routes to the next module the lowest 8 lanes of the PCI Express x16 link Re drives the clock of the Type 1 PCI Express x16 or the Type 2 PCI Express x4 links Coaxlink Hardware Manual ...

Page 28: ...istribution power requirements etc 3 1 Camera Interfaces 29 3 2 PCI Express Interface 32 3 3 Power Distribution Schemes 33 3 4 PCI Express Power 38 3 5 Camera Power Input 39 3 6 I O Power Output 40 3 7 Differential Input 41 3 8 TTL Input Output Version 1 43 3 9 TTL 5 V CMOS and LVTTL Levels 46 3 10 Isolated Input 47 3 11 Isolated Output 49 Coaxlink Hardware Manual ...

Page 29: ...era Interfaces Camera Interface Type per Product Product Camera Interface Type 1629 Coaxlink Duo PCIe 104 EMB CoaXPress CXP 6 Host Interface on the next page 1634 Coaxlink Duo PCIe 104 MIL CoaXPress CXP 6 Host Interface on the next page Coaxlink Hardware Manual ...

Page 30: ...tandard 1 1 Cable Driver and Receiver Specification Parameter Conditions Min Typ Max Unit High speed receiver bit rate 1 25 6 25 GT s Low speed driver bit rate 20 833 MT s Max cable length BELDEN 1694 1 25 GT s 130 m BELDEN 1694 2 5 GT s 110 m BELDEN 1694 3 125 GT s 100 m BELDEN 1694 5 GT s 60 m BELDEN 1694 6 25 GT s 40 m Power Transmitting Unit Specification Parameter Min Typ Max Unit DC output v...

Page 31: ...31 NOTE The above specification applies over the whole operating temperature range of the card See also Refer to Power Over CoaXPress in the Functional Guide Coaxlink Hardware Manual ...

Page 32: ...plies with Revision 2 0 of the PCI Express Card Electromechanical specification supports 1 lane 2 lane and 4 lane link width supports PCIe Rev 2 0 link speed 5 0 GT s with 8b 10b coding supports PCIe Rev 1 0 link speed 2 5 GT s with 8b 10b coding supports payload size up to 512 bytes offers the optimal performance when it is configured for 4 lane PCIe Rev 2 0 link speed 5 GT s 4 lane Rev 3 0 PCIe ...

Page 33: ...33 3 3 Power Distribution Schemes Coaxlink Hardware Manual ...

Page 34: ...vers power to all the on board electronic devices including FPGA memory chips CoaXPress transceivers I O drivers and receivers fan motor It also delivers 3 3 V and 12 V to the 3300 HD26F I O module for Coaxlink Duo PCIe 104 plugged on the extension connector The 3 3 V is used for powering the on board electronics I O drivers I O receivers The 12 V is used for delivering power on the I O connector ...

Page 35: ...k is fed by a 24 VDC external power supply attached to the camera power input connector using a power cable terminated by a 4 pin Molex plug connector A protection fuse inserted at the input side prevents potential fire hazards The 24 volt DC power is applied to each camera connection through a PoCXP transmitter unit Each PoCXP transmitter unit implements an electronic fuse switch A PTC inserted a...

Page 36: ...ution network delivers power to all the on board electronic devices including FPGA memory chips CoaXPress transceivers I O drivers and receivers fan motor It also delivers 3 3 V and 12 V to the I O module plugged on the extension connector The 3 3 V is used for powering the on board electronics I O drivers I O receivers The 12 V is used for delivering power on the I O connector A PTC inserted at t...

Page 37: ...k is fed by a 24 VDC external power supply attached to the camera power input connector using a power cable terminated by a 4 pin Molex plug connector A protection fuse inserted at the input side prevents potential fire hazards The 24 volt DC power is applied to each camera connection through a PoCXP transmitter unit Each PoCXP transmitter unit implements an electronic fuse switch A PTC inserted a...

Page 38: ...ns operating at their maximum speed Delivering image data on the PCI Express configured for the largest link width and the highest link speed Operating 25 C 77 F ambient temperature and nominal supply voltages Product 12 V 3 3 V Total Units 1629 Coaxlink Duo PCIe 104 EMB 8 4 0 8 4 W 1634 Coaxlink Duo PCIe 104 MIL 8 4 0 8 4 W Voltage requirements Parameter Min Typ Max Units 3 3 V voltage 3 0 3 3 3 ...

Page 39: ...39 3 5 Camera Power Input Applies to Parameter Conditions Min Typ Max Units DC input voltage 23 24 25 V DC input power 1 connection PoCXP 17 W 2 connection PoCXP 34 W Coaxlink Hardware Manual ...

Page 40: ...power on sequence Protects the Coaxlink card and the power source against overload Protects the Coaxlink card the power source against short circuits The sum of the load currents drawn from all the 12 V outputs of the I O connectors must be lower or equal to the specified maximum output current I O 12 V power output specification Parameter Conditions Min Typ Max Units Aggregated output current Ope...

Page 41: ...s Parameter Conditions Min Typ Max Units Common mode voltage 7 7 V Differential sensitivity 200 mV Input impedance 120 Ohm ESD protection Human Body Model HBM 15 kV Contact discharge 8 kV Air gap discharge 15 kV AC characteristics Parameter Min Typ Max Units Pulse width 100 ns Pulse rate 0 5 MHz 10 90 rise fall time 1 µs Coaxlink Hardware Manual ...

Page 42: ...lative V V voltage Logical State V V HIGH V V LOW Unconnected input HIGH Compatible drivers The following drivers are compatible with the high speed differential input ports RS 422 RS 485 differential line drivers Complementary TTL drivers Coaxlink Hardware Manual ...

Page 43: ...43 3 8 TTL Input Output Version 1 Applies to TTL Input Output Simplified schematic The port implements a 3 3 V LVTTL driver and a 5 V compliant 3 3 V LVTTL receiver Coaxlink Hardware Manual ...

Page 44: ...High level output current 32 mA High level output voltage 8 mA 1 2 60 3 00 V 16 mA 1 2 20 2 70 V 32 mA 1 1 75 2 20 V ESD protection Human Body Model HBM 2 kV Condition 1 300 Ohms line termination resistor to GND Receiver Parameter Conditions Min Typ Max Units Absolute maximum voltage rating 0 5 V AC characteristics Parameter Conditions Min Typ Max Units Pulse width 100 ns Pulse rate 0 5 MHz 10 90 ...

Page 45: ...VIN 0 8 V LOW Unconnected input port Undetermined Compatible sources Sources with the following drivers are compatible LVTTL 3 3 V low voltage TTL TTL 5 V TTL CMOS 5 V CMOS Compatible loads Loads with the following receivers are compatible LVTTL 3 3 V low voltage TTL TTL 5 V TTL Coaxlink Hardware Manual ...

Page 46: ...igh level are unspecified Voltage levels VIL maximum low state voltage receiver input VIH minimum high state voltage receiver input VOL maximum low state voltage driver output VOH minimum high state voltage driver output Vt threshold level typically at the middle of the transition range Coaxlink Hardware Manual ...

Page 47: ... DC characteristics Parameter Conditions Min Typ Max Units Differential voltage 30 30 V Input current threshold 1 mA Differential voltage 1 mA 1 5 1 65 1 9 V Input current VIN VIN 1 65 V 1 mA VIN VIN 2 5 V 2 mA VIN VIN 5 V 2 3 mA VIN VIN 12 V 3 mA VIN VIN 30 V 5 mA VIN VIN 1 V 10 µA DC isolation voltage 250 V AC isolation voltage 170 VRMS Coaxlink Hardware Manual ...

Page 48: ...uts Totem pole LVTTL TTL 5 V CMOS drivers RS 422 Differential line drivers Potential free contact solid state relay or opto isolators 12 V and 24 V signaling voltages are also accepted NOTE The 12 V power supply on the I O connector s can be used for powering drivers requiring a power supply No external resistors are required However to obtain the best noise immunity with 12 V and 24 V signaling i...

Page 49: ...nt 100 mA Differential voltage Open state 30 30 V Closed state 1 mA 0 4 V Closed state 100 mA 1 0 V DC isolation voltage 250 V AC isolation voltage 170 VRMS NOTE The output port in the closed state has no current limiter the user circuit must be designed to avoid excessive currents that could destroy the output port The output port remains in the OFF state until it is under control of the applicat...

Page 50: ...The state of the output port is determined as follows Logical State Output port state HIGH The contact switch is closed ON LOW The contact switch is open OFF Compatible loads The following loads are compatible with the isolated contact output ports Any load within the 30 V 100 mA envelope is accepted The power originates from an external power source or alternatively from the power delivered throu...

Page 51: ...of the product s including climatic requirements electromagnetic standards compliance statements safety standards compliance statements etc 4 1 Environmental Conditions 52 4 2 Temperature Monitor 53 4 3 Thermal Data 55 4 4 Compliances 56 Coaxlink Hardware Manual ...

Page 52: ...TBD 70 158 C F Ambient air humidity Non condensing TBD TBD RH Operating Conditions Applies to Parameter Conditions Min Max Units FPGA die temperature 80 176 C F Ambient air temperature 0 32 55 131 C F Ambient air humidity Non condensing 10 90 RH Applies to Parameter Conditions Min Max Units FPGA die temperature 100 212 C F Ambient air temperature Conduction cooling 40 40 85 185 C F Ambient air hum...

Page 53: ...he gap between modules of the PCIe 104 stack 4 2 Temperature Monitor FPGA die temperature sensor All Coaxlink cards embed a temperature sensor on the FPGA die When the TemperatureSensorSelector feature of the Interface Module is set to Grabber the Temperature feature of the Interface Module reports the FPGA die temperature expressed in C The user application is invited to check regularly the FPGA ...

Page 54: ...cur in the FPGA if its core temperature becomes excessive Therefore for security reasons the stream acquisition is stopped when the measured FPGA die temperature reaches 103 C The FPGA temperature is too high stopping operation to prevent damaging the card Memento message is sent repeatedly every second until the measured temperature decreases below 97 C TIP Stopping the acquisition reduces signif...

Page 55: ...he card for two use cases 1 Heat power 1 when the card doesn t deliver any PoCXP power 2 Heat power 2 when the card delivers the maximum PoCXP power on all connectors Product Heat power 1 Heat power 2 Cooling method 1629 Coaxlink Duo PCIe 104 EMB 8 4 W 8 4 W Conduction 1634 Coaxlink Duo PCIe 104 MIL 8 4 W 8 4 W Conduction Requirements for conduction cooled products The heat produced by the board i...

Page 56: ...ss B compliant unit To meet EC requirements shielded cables must be used to connect a peripheral to the card CE compliance statement Applies to Notice for Europe This product is in conformity with the Council Directive 2014 30 EU This piece of equipment has been tested and found to comply with Class B EN55022 CISPR22 electromagnetic emission requirements and Class A EN55024 CISPR24 electromagnetic...

Page 57: ...alled and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference b...

Page 58: ...ment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that...

Page 59: ...statement According the European Union 2012 19 EU directive the product must be disposed of separately from normal household waste It must be recycled according to the local regulations Coaxlink Hardware Manual ...

Page 60: ...60 5 Related Products Accessories 5 1 3300 3302 Accessories for Coaxlink Duo PCIe 104 61 5 2 Custom C2C Link Ribbon Cable Assembly 63 Coaxlink Hardware Manual ...

Page 61: ... PCIe 104 3300 HD26F I O module for Coaxlink Duo PCIe 104 3300 I O Connector on page 13 CoaXPress LED lamps on page 18 3302 DIN1 0 2 3 Coaxial cable for Coaxlink Duo PCIe 104 3302 DIN 2 CoaXPress Host Connector on page 10 Coaxlink Hardware Manual ...

Page 62: ...embly 1629 Coaxlink Duo PCIe 104 EMB with 3300 HD26F I O module for Coaxlink Duo PCIe 104 3301 Thermal drain Model 1 for Coaxlink Duo PCIe 104 and 2 3302 DIN1 0 2 3 Coaxial cable for Coaxlink Duo PCIe 104 Coaxlink Hardware Manual ...

Page 63: ... in pitch ribbon cable For instance Belden s 9L280XX Series Two or more pieces of a 2 x 3 pin female ribbon cable connectors For instance TE connectivity 1 1658528 1 The cable assembly has A maximum of 4 connectors allowing up to 4 cards to share the same C2C Link A maximum length of 60 cm NOTE The connector pitch es must be determined according to the actual card to card spacing in the Host PC Co...

Page 64: ...64 6 Appendix Appendix to Coaxlink cards hardware manual Coaxlink Hardware Manual ...

Page 65: ...65 6 1 Connecting TTL Devices to Isolated I O Ports This application note explains how to connect TTL devices to the isolated inputs and isolated outputs Coaxlink Hardware Manual ...

Page 66: ...utput voltage is within the upper red window The minimum driver output voltage namely VOH is 2 4 V for both TTL and LVTTL The maximum driver output voltage is VCC 5 V for TTL and 3 3 V for LVTTL Receiver input The receiver guarantees to see a low logic level when the input signal voltage is within the bottom red and dark gray windows The maximum receiver input voltage namely VIL is 0 8 V for both ...

Page 67: ...tput and the receiver input WARNING The light gray window is an area where the receiver cannot guarantee the logic level Typically the actual transition Vt between logic level low and high will occur at around 1 5 V but the actual Vt level may change a lot according to specimens or process P variations actual Vcc supply voltage V and temperature T Only VIL and VIH are guaranteed over P V T variati...

Page 68: ...age margins and what are the dynamic limitations Wiring diagram Connecting an LV TTL driver to an isolated input See also Connectors on page 9 in the hardware manual for pin assignments 1 Connect TTL Signal to IN 2 Connect TTL Circuit Ground Digital GND to IN TIP As good practice it is recommended to shield the whole set of wires using a shielded cable Shielding improve EMI protection against exte...

Page 69: ... high logic level This is compatible with the current drive capabilities of LV TTL drivers at as most LV TTL drivers provides 16 mA Even old TTL technologies provides 4 mA min in any case Dynamic limitations Isolated inputs requires a minimum pulse high of 10 µs The highest achievable pulse rate is 50 KHz Isolated inputs adds an extra delay of typically 5 µs 10 µs maximum NOTE The delay can be som...

Page 70: ...s at their inputs The power supply line must be carried through the cable up to the OUT pin of the opto coupler In this case the voltage rail is called VCC as the voltage could be the same as the TTL receiver VCC pin This circuit needs only one pull down resistor as show in the next figure A resistor of 180 ohm 1 8 W is suggested as best compromise but the circuit can also work within a large rang...

Page 71: ...he circuit requirements TIP As good practice it is recommended to shield the whole set of wires using a shielded cable Shielding improve EMI protection against external interferences immunity and avoid unwanted EM emissions The shield should be connected to the devices PC cameras and systems components chassis and should be separated from the digital GND line Static levels compatibility The follow...

Page 72: ... that the circuit can support the presence of an external pull up resistor up to a minimum value of 1K5 ohm in 3 3 V or 2K4 ohm in 5 V If needed an other R value can be chosen according to the actual pull up load within the circuit NOTE 2 In any case the voltage drop across the opto coupler pins VOUT VOUTt is lower than 0 9 V Which gives the following results 3 3 V 0 9 V 2 4 V 5 V 0 9 V 4 1 V Dyna...

Page 73: ...t compromise but the circuit can also work within a large range of resistor values from 50 ohm 1 2 W to 10K ohm 1 16 W 1 A resistor of 560 ohm 1 4 W is suggested for RPOL as best companion of R 180 ohm but the value of RPOLcan be adapted to match accordingly others R values If an existing pull down resistor is already available at the TTL receiver side it can be used as R resistor to operate the c...

Page 74: ...ue that suits the circuit requirements Static levels compatibility The following table shows that the voltage levels are well compatible and that they remains acceptable voltage margins for both TTL and LVTTL applications Voltage levels and margins Rpol 560 ohm 1 4 W R 180 ohm 1 8 W Isolated Output Logic Level Isolated Output State Isolated Output Voltage Level TTL Input Voltage Level Voltage Marg...

Page 75: ...bout 0 9 V Dynamic limitations The maximum pulse width of isolated outputs is about 5 µs and the maximum pulse rate is 100 KHz Isolated outputs add an extra delay of about 5 µs in the signal propagation The resistor value of R 180 ohm has good dynamic results for a usual capacitive loads as 1 or 2 meters of cable As example a 2m cable will add 100 pF of load 50pF m which give a rise time of about ...

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