ETAS
Introduction
XETK-S21.0B
-
User
Guide
15
3.2
Features
• Measurement interface:
– 3.3
V JTAG output levels, 5.0
V tolerant JTAG input
– Configurable JTAG interface clock speed: 20
MHz, 40
MHz, 50
MHz
– Pinless startup protocol for XETK recognition and data acquisition
triggering
• Calibration:
– Microcontroller capability of internal Flash emulation can be used
– XETK powers Emulation Device RAM (for calibration purpose)
– Supports “Start on Any Page”
• Debugger interface:
– XETK provides additional connector for external debug hardware
– simultaneously use XETK and debugger
• Supports special coldstart mechanism (“Calibration Wake Up”):
– Calibration Wake Up: Wake up mechanism to wake up the power sup
-
ply of the ECU via the Calibration Wake up pin
– Pull CalWakeUp until Startup Handshake: duration of the Wake up
mechanism is configurable
• ECU flashing via XETK
– Braindead flashing under ProF control
• Permanent storage of configuration in EEPROM
• Fast Ethernet Interface:
– Direct connection to PC
– Open XCP on Ethernet Protocol
– Supports a variety of standard applications
• “ETK Drivers and Tools” update to support ETAS software tools (INCA,
XCT)
• Firmware update (programming of the logic device) through HSP soft
-
ware service packs; removal of XETK or ECU is not necessary
• Mounting possibilities inside or on top of ECU
• Temperature range suitable for automotive application
For more technical data on the XETK-S21.0 consult the chapter “Technical
Data” on page
NOTE
The max. allowed JTAG clock depends on the core frequency of the micro-
controller. Max. clock speed is typically 1/4 of the core frequency.
