5 OPERaTIOnS anD FUnCTIOnS OF THE S5U1C63000H6
S5U1C63000H6 ManUal
EPSOn
9
(S1C63 Family In-Circuit Emulator)
5.2 Break Function
(1) Forced break
The debugger on the host computer can forced break the emulation. This function is useful when the program
counter does not proceed by executing the SLP or HALT instruction in a single step process.
(2) Break commands
Some break commands are available to set various breaking condition. A break occurs when the break condi-
tion specified by the command and status of the S1C63000 CPU are met.
(3) Break by accessing to undefined area
This break occurs when the target program accesses an address exceeding the ROM capacity of the actual chip.
The break is also occurred when any address other than the RAM area or mapped I/O area of the actual chip is
accessed.
(4) Break by accessing write protect area
This break occurs when the target program writes data to the read only memory such as a character generator
ROM. The memory contents are protected even if this break occurs.
(5) Break by incorrect stack accessing
This break occurs when the target program makes incorrectly stacking operation exceeding the defined stack
area in the S1C63000 CPU.
(6) BRKIn terminal
When a signal is input to the BRKIN terminal, a break occurs at the falling edge of the signal.
5.3 Monitoring Terminals
(1) TRGOUT output terminal
A low level pulse is output at the T3 state of the clock when the trace trigger condition and the bus cycle are
met.
T1 T2 T3 T4
PK
PL
Bus cycle
TRGOUT output
CLK from
peripheral circuit board
Coincidence with trace trigger
Figure 5.3.1 TRGOUT Terminal Output
(2) STOPOUT output terminal
This terminal goes low when the S1C63000 CPU is suspended (by executing of the HALT or SLP instruction).
This terminal also outputs low level during a break.
Indicating suspension
of CPU operation
STOPOUT output
Running
Breaking
Figure 5.3.2 STOPOUT Terminal Output