S1C63454 TECHNICAL MANUAL
EPSON
5
CHAPTER 1: OUTLINE
(2) Time authorize circuit for the simultaneous LOW input reset function
When using the external reset function (shown in 1 above), using the time authorize circuit or not can
be selected by the mask option. The reset function works only when the input time of simultaneous
LOW is more than the rule time if the time authorize circuit is being used.
Refer to Section 2.2.2, "Simultaneous low input to terminals K00–K03", for details.
(3) Input port pull-up resistor
The mask option is used to select whether the pull-up resistor is supplemented to the input ports or
not. It is possible to select for each bit of the input ports.
Refer to Section 4.4.3, "Mask option", for details.
(4) Output specification of the output port
Either complementary output or N-channel open drain output can be selected as the output specifica-
tion for the output ports R00–R03. The selection is done in 1-bit units.
Refer to Section 4.5.2, "Mask option", for details.
(5) Input specification / output specification / pull-up resistor of the I/O ports
For the output specification when the I/O ports (P00–P03, P10–P13) are in the output mode, either
complementary output or N-channel open drain output can be selected.
Further, whether or not the pull-up resistors working in the input mode are supplemented can be
selected. The selection is done in 4-bit units (P00–P03 and P10–P13).
When using the I/O port P10–P13 as the serial interface input/output terminals, the input specifica-
tion for the terminals that are used for the serial interface input can be selected from either "normal
input" or "with Schmitt trigger input". This option is applied to the serial interface input terminals,
and is fixed at "normal input" when the terminals are used for the I/O port P10–P13.
Refer to Section 4.6.2, "Mask option", for details.
(6) LCD drive bias
Either the internal power supply (1/4 bias) or an external power supply (1/5 bias) can be selected as
the LCD system power supply.
Refer to Section 4.7.3, "Mask option", for details.
(7) Synchronous clock polarity in the serial interface
The polarity of the synchronous clock SCLK and the SRDY signal in slave mode of the serial interface
is selected by the mask option. Either positive polarity or negative polarity can be selected.
Refer to Section 4.11.2, "Mask option", for details.
(8) Buzzer output specification of the sound generator
It is possible to select the polarity of the buzzer signal output from the BZ terminal. Select either
positive polarity or negative polarity according to the external drive transistor to be used.
Refer to Section 4.12.2, "Mask option", for details.
(9) OSC1 oscillation circuit
Either crystal oscillation circuit or CR oscillation circuit can be selected as the OSC1 oscillation circuit.
Refer to Section 4.3.2, "OSC1 oscillation circuit", for details.
(10)OSC3 oscillation circuit
Either CR oscillation circuit or ceramic oscillation circuit can be selected as the OSC3 oscillation circuit.
Refer to Section 4.3.3, "OSC3 oscillation circuit", for details.
