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EPSON
S1C63358 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
CHS0, CHS1: Analog input channel selection register (FFD0H•D0, D1)
Selects an analog input channel.
Table 4.10.6.3 Selection of analog input channel
Input channel
AD3 (P43)
AD2 (P42)
AD1 (P41)
AD0 (P40)
CHS1
1
1
0
0
CHS0
1
0
1
0
At initial reset, this register is set to "0" (AD0).
VADSEL: A/D power source selection register (FF01H•D3)
Selects the power supply for the A/D converter.
When "1" is written: V
C2
When "0" is written: V
DD
Reading: Valid
When "1" is written to the VADSEL register, the A/D converter operates with the V
C2
voltage output from
the LCD voltage booster. Use V
C2
when the supply voltage is 1.6 V or less. To generate V
C2
, write "1" to
the LPWR register (FF60H•D0) and wait at least 100 msec to stabilize the V
C2
voltage.
When "0" is written, the A/D converter operates with V
DD.
In this case, V
DD
must be 1.6 V or more.
At initial reset, this register is set to "0" (V
DD
).
ADRUN: A/D conversion control (FFD0H•D3)
Starts an A/D conversion.
When "1" is written: Start
When "0" is written: No operation
Reading: Invalid
When "1" is written to ADRUN, the A/D converter starts A/D conversion of the channel selected by the
CHS register and stores the conversion result to the ADDR register.
At initial reset, this bit is set to "0".
ADDR0–ADDR7: A/D conversion result (FFD2H/lower 4 bits, FFD3H/upper 4 bits)
A/D conversion result is stored.
ADDR0 is the LSB and ADDR7 is the MSB.
At initial reset, data is undefined.
EIAD: A/D converter interrupt mask register (FFE7H•D0)
This register is used to select whether to mask the A/D converter interrupt or not.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
Writing "1" to the EIAD register enables the A/D converter interrupt and writing "0" disables the inter-
rupt.
At initial reset, this register is set to "0".
