9: Debugging Your System
ARM720T CORE CPU MANUAL
EPSON
9-23
9.14.3
Instruction register
Purpose
Changes the current TAP instruction.
Length
4 bits.
Operating mode
In the SHIFT-IR state, the instruction register is selected as the
serial path between DBGTDI, and DBGTDO.
During the CAPTURE-IR state, the binary value 0001 is loaded
into this register. This value is shifted out during SHIFT-IR (least
significant bit first), while a new instruction is shifted in (least
significant bit first).
During the UPDATE-IR state, the value in the instruction register
becomes the current instruction.
On reset, IDCODE becomes the current instruction.
There is no parity bit.
9.14.4
Scan path select register
Purpose
Changes the current active scan chain.
Length 4
bits.
Operating mode
SCAN_N as the current instruction in the SHIFT-DR state selects
the scan path select register as the serial path between DBGTDI,
and DBGTDO.
During the CAPTURE-DR state, the value b1000 binary is loaded
into this register. This value is loaded out during SHIFT-DR (least
significant bit first), while a new value is loaded in (least
significant bit first). During the UPDATE-DR state, the value in
the register selects a scan chain to become the currently active scan
chain. All additional instructions, such as INTEST, then apply to
that scan chain.
The currently-selected scan chain changes only when a SCAN_N
instruction is executed, or when a reset occurs. On reset, scan chain
0 is selected as the active scan chain.
Table 9-5 shows the scan chain number allocation.
Table 9-5 Scan chain number allocation
Scan chain number
Function
0
(User-implemented)
1
Debug
2
EmbeddedICE-RT
programming
3
Reserved
a
a.
When selected, reserved scan
chains scan out zeros.
4
Reserved
a
8
Reserved
a
Summary of Contents for ARM720T Core cpu
Page 4: ......
Page 12: ...CONTENTS viii EPSON ARM DDI 0229B THIS PAGE IS BLANK ...
Page 13: ...Preface ...
Page 14: ......
Page 18: ...Preface xiv EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 19: ...1 Introduction ...
Page 20: ......
Page 39: ...2 Programmer s Model ...
Page 40: ......
Page 58: ...2 Programmer s Model 2 18 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 59: ...3 Configuration ...
Page 60: ......
Page 70: ...3 Configuration 3 10 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 71: ...4 Instruction and Data Cache ...
Page 72: ......
Page 75: ...5 Write Buffer ...
Page 76: ......
Page 79: ...6 The Bus Interface ...
Page 80: ......
Page 94: ...6 The Bus Interface 6 14 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 95: ...7 Memory Management Unit ...
Page 96: ......
Page 118: ...7 Memory Management Unit 7 22 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 119: ...8 Coprocessor Interface ...
Page 120: ......
Page 131: ...9 Debugging Your System ...
Page 132: ......
Page 177: ...10 ETM Interface ...
Page 178: ......
Page 182: ...10 ETM Interface 10 4 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 183: ...11 Test Support ...
Page 184: ......
Page 198: ...11 Test Support 11 14 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 199: ...Appendix A Signal Descriptions ...
Page 200: ......
Page 208: ...A Signal Descriptions A 8 EPSON ARM720T CORE CPU MANUAL THIS PAGE IS BLANK ...
Page 209: ...Glossary ...
Page 210: ......
Page 217: ...Index ...
Page 218: ......