Embest Technology
Copyright © 2014-2015 Embest Technology SBC9000 User Manual
11
Pins
Definitions
Descriptions
16
ON_OFF
System power on/off control signal
17
RESET_N_B
System reset control signal
18
GND
GND
19
CAN2_RXD
CAN2 receive data
20
CAN2_TXD
CAN2 transmit data
21
I2C2_SDA
I2C2 master serial data
22
I2C2_SCL
I2C2 master serial clock
23
GPIO4_IO11
GPIO signal
24
GPIO4_IO06
GPIO signal
25
EIM_WAIT
EIM ready/busy/wait signal
26
EIM_EB1
EIM byte enable
27
EIM_LBA
EIM address valid
28
EIM_CS0
EIM chip select
29
EIM_OE
EIM output enable
30
EIM_CS1
EIM chip select
31
EIM_EB0
EIM byte enable
32
EIM_RW
EIM memory write enable
33
EIM_D29
EIM MSB data bus signal
34
EIM_D28
EIM MSB data bus signal
35
EIM_CRE
Used as CRE/PS for Cellular Rammemory.
36
EIM_EB3
EIM byte enable
37
EIM_EB2
EIM byte enable
38
EIM_BCLK
EIM burst clock
39
EIM_A26
EIM MSB address bus signal
40
EIM_A23
EIM MSB address bus signal
41
EIM_A22
EIM MSB address bus signal
42
EIM_A18
EIM MSB address bus signal
43
EIM_A24
EIM MSB address bus signal
44
EIM_A21
EIM MSB address bus signal
45
EIM_A25
EIM MSB address bus signal
46
EIM_A16
EIM MSB address bus signal
47
EIM_A20
EIM MSB address bus signal
48
EIM_A19
EIM MSB address bus signal
49
EIM_A17
EIM MSB address bus signal
50
GND
GND
51
GPIO1_IO27
GPIO signal
52
EIM_DA11
EIM LSB multiplexed address/data bus signal
53
EIM_DA13
EIM LSB multiplexed address/data bus signal
54
EIM_DA14
EIM LSB multiplexed address/data bus signal
55
EIM_DA9
EIM LSB multiplexed address/data bus signal
56
EIM_DA12
EIM LSB multiplexed address/data bus signal
57
EIM_DA10
EIM LSB multiplexed address/data bus signal