background image

User's Guide

SLAU203 – February 2007

ADS8472EVM

This user guide describes the characteristics, operation, and use of the ADS8472 16-bit, 1MHz parallel
interface analog-to-digital converter evaluation board. A complete circuit description as well as schematic
diagram and bill of materials is included.

Contents

1

EVM Overview

...............................................................................................................

2

2

Introduction

...................................................................................................................

2

3

Analog Interface

..............................................................................................................

2

4

Digital Interface

..............................................................................................................

5

5

Power Supplies

..............................................................................................................

7

6

Using the ADS8472EVM

....................................................................................................

8

7

ADS8472EVM BoM

........................................................................................................

10

8

ADS8472EVM Layout

.....................................................................................................

12

9

ADS8472EVM Schematic

.................................................................................................

15

List of Figures

1

Input Buffer, Bipolar Fully Differential Input

..............................................................................

4

2

Top – Layer 1

...............................................................................................................

12

3

Ground Plane – Layer 2

...................................................................................................

13

4

Power Plane – Layer 3

....................................................................................................

13

5

Bottom – Layer 4

...........................................................................................................

14

6

Top Overlay

................................................................................................................

14

7

Bottom OverLay

............................................................................................................

15

List of Tables

1

Analog Input Connector

.....................................................................................................

3

2

Analog Circuitry Jumper Configurations

..................................................................................

4

3

Pinout for Parallel Control Connector P3

.................................................................................

5

4

Jumper Settings

..............................................................................................................

5

5

Data Bus Connector P2

.....................................................................................................

6

6

TSW1100 Connector

........................................................................................................

6

7

Pin out for Converter Control Connector, J6

.............................................................................

7

8

Power Supply Test Points

..................................................................................................

7

9

Power Connector, J5, Pin Out

.............................................................................................

7

10

Bill of Materials

.............................................................................................................

10

SLAU203 – February 2007

ADS8472EVM

1

Submit Documentation Feedback

Summary of Contents for ADS8472EVM

Page 1: ...BoM 10 8 ADS8472EVM Layout 12 9 ADS8472EVM Schematic 15 List of Figures 1 Input Buffer Bipolar Fully Differential Input 4 2 Top Layer 1 12 3 Ground Plane Layer 2 13 4 Power Plane Layer 3 13 5 Bottom Layer 4 14 6 Top Overlay 14 7 Bottom OverLay 15 List of Tables 1 Analog Input Connector 3 2 Analog Circuitry Jumper Configurations 4 3 Pinout for Parallel Control Connector P3 5 4 Jumper Settings 5 5 D...

Page 2: ...ation register SAR converter with an inherent sample and hold The ADS8472 has a 16 bit and 8 bit parallel interface bus options allowing a variety of processors to interface easily with it The ADS8472EVM is an evaluation and demonstration platform for the ADS8472 ADC The board is a flexible design that allows the user to choose among many different analog signal conditioning reference and interfac...

Page 3: ...s resistor to filter the input signal behaves like a charge reservoir and provides a path to ground for high frequency noise and the low small input current transient which occurs when the device switches from hold to sample mode This external filter capacitor works with the amplifier to charge the internal sampling capacitor during sampling mode The supplies to the input amplifier are selectable ...

Page 4: ...minus rail supply to ground Not Installed Installed 1 Set U6 operational amplifier minus rail supply to VCC SJP4 Installed Not Installed Set U7 operational amplifier minus rail supply to ground Not Installed Installed 1 Set U7 operational amplifier minus rail supply to VCC SJP5 Not Installed N A Short voltage node DC to U6 pin 2 via R35 SJP6 Not Installed N A Short IN pin of U5 to ground at C45 1 ...

Page 5: ...cal when measuring large amplitude and or high frequency input signals the user provide a clean low jitter convert start pulse The convert start signal can be applied to the ADS8472 from the decoder outputs or from connector P3 pin 17 Address decoder SN74ACH138 is used to generate the read RD and conversion start CONVST signals to the converter Jumpers W3 and W4 allow the user to assign these two ...

Page 6: ...GND Ground Data Bit 12 DB12 P2 29 P2 30 GND Ground Data Bit 13 DB13 P2 31 P2 32 GND Ground Data Bit 14 DB14 P2 33 P2 34 GND Ground Data Bit 15 DB15 P2 35 P2 36 GND Ground In addition to interfacing to the various micro controller and digital signal processors from Texas Instruments this board also plugs into the TSW1100 card The TSW1100 is a PC based data capture card J7 connector is installed to ...

Page 7: ...ccepts four power supplies A dual VA DC supply for the dual supply op amps Recommend 6VDC supply A single 5 0 V DC supply for analog section of the board A D Reference A single 5 0V or 3 3V DC supply for digital section of the board A D address decoder buffers There are two ways to provide these voltages 1 Wire in the voltages at test points on the EVM See Table 8 Table 8 Power Supply Test Points ...

Page 8: ...ply voltage can be applied at test point TP4 or at connector J5 pin 1 There are two common methods to evaluate the ADS8472EVM s performance 1 EVM used as a stand alone system The user is responsible for capturing and analyzing the data typically via a logic analyzer and analysis software LABView MATLAB etc 2 EVM used in conjunction with TI s TSW1100 data capture card http focus ti com docs toolsw ...

Page 9: ...e the 5 6K Interface Board user s guide SLAU104 For the software engineer the ADS8472EVM provides a simple platform for interfacing to the converter The EVM provides standard 0 1 inch headers and sockets to wire into prototype boards The user need only provide three address lines A2 A1 and A0 and address valid line DC_CS to connector P3 To select which address combinations generate RD and CONVST s...

Page 10: ...anasonic ERJ 3EKF1002V RES 10 0kΩ 1 10W 1 0603 SMD ECG or Alternate 1 10k R46 805 Panasonic ERJ 6GEYJ103V RES 10kΩ 1 8W 5 0805 SMD ECG or Alternate 2 NI R6 R28 603 Not Installed Not Installed 11 NI R7 R9 R13 805 Not Installed Not Installed R18 R20 R32 R34 R35 2 47 RP1 RP2 CTS_742 CTS 742C163470JTR RES ARRAY 47Ω 16TERM 8RES SMD Corporation 1 1K RP3 CTS_742 CTS 742C163102JTR RES ARRAY 1kΩ 16TERM 8RE...

Page 11: ...8472 U5 48 QFN RGZ Texas ADS8472IBRGZR ADS8472 16 bit 1MSPS A D Instruments 2 THS4031 U6 U7 8 SOP D Texas THS4031IDR 100 MHz Low noise high speed amplifier Instruments 4 SN74AHC U8 U11 20 TSSOP PW Texas SN74AHC245PWR Octal Bus Transceiver 3 State 245PWR Instruments 1 SN74AHC U12 5 SOT DBV Texas SN74AHC1G04DBVR Single Inverter Gate 1G04DBV Instruments 1 SN74AHC U13 16 TSSOP PW Texas SN74AHC138PWR 3...

Page 12: ...PER 1 2POS_JU W5 2pos_jump Samtec TSW 102 07 L S 2 Position Jumper _ 0 1 spacing MPER 8 TP_0 025 TP3 TP7 TP9 test_point2 Keystone 5000K ND TEST POINT PC MINI 0 040 D RED TP11 TP12 Electronics 6 TP_0 025 TP1 TP2 TP8 test_point2 Keystone 5001K ND TEST POINT PC MINI 0 040 D BLACK TP10 TP13 Electronics TP14 This section contains the EVM layout Figure 2 Top Layer 1 12 ADS8472EVM SLAU203 February 2007 S...

Page 13: ...www ti com ADS8472EVM Layout Figure 3 Ground Plane Layer 2 Figure 4 Power Plane Layer 3 SLAU203 February 2007 ADS8472EVM 13 Submit Documentation Feedback ...

Page 14: ...ADS8472EVM Layout www ti com Figure 5 Bottom Layer 4 Figure 6 Top Overlay 14 ADS8472EVM SLAU203 February 2007 Submit Documentation Feedback ...

Page 15: ...9 ADS8472EVM Schematic www ti com ADS8472EVM Schematic Figure 7 Bottom OverLay Schematic diagram pages are appended to this user s guide SLAU203 February 2007 ADS8472EVM 15 Submit Documentation Feedback ...

Page 16: ... 2 3 4 5 6 7 8 9 10 J5 VA VA 5VD AGND 5VA DGND 3 3VD W1 Lijoy Philipose Lijoy Philipose 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 P3 Parallel Control INTC A1 DC_CS A2 ADC Data Bus 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 P2 B_DB0 B_DB...

Page 17: ... 0 R6 NI VCC VCC C13 0 1uF C14 0 1uF 3 2 6 7 4 5 1 8 U7 THS4031 3 2 6 7 4 5 1 8 U6 THS4031 C12 0 1uF C11 0 1uF VCC VCC R9 NI IN IN R37 1k R21 1k R35 NI R31 1k R32 NI 1 2 SJP5 DC R38 75 R36 75 DC R20 NI R34 NI R12 NI R18 NI R7 NI R39 5 1 R40 5 1 C45 2200pF C47 NI C46 NI R19 0 R22 0 C0G C41 1uF C42 1uF R8 1k R26 33 C19 NI C18 NI R25 33 DC DC R2 49 9 R3 49 9 C44 NI C43 NI R17 0 VBD 1 BUS18 16 2 BYTE ...

Page 18: ... OE DIR A1 A2 A3 A4 A5 A6 A7 A8 B1 B2 B3 B4 B5 B6 B7 B8 VCC GND U8 SN74AHC245PWR VBD C66 0 1uF CS RD CONVST BYTE R42 10k R43 10k R44 10k VBD R45 10k R41 10k BUSY B_CS B_RD B_CONVST B_BYTE B_BUS18 16 DB 17 0 B_DB 17 0 B_CS B_BYTE B_CONVST B_RD B_BUS18 16 2 4 5 3 U12 SN74AHC1G04DBV VBD C68 0 1uF W2 INTc Lijoy Philipose Lijoy Philipose A 1 B 2 C 3 G1 6 G2A 4 G2B 5 Y0 15 Y1 14 Y2 13 Y3 12 Y4 11 Y5 10 ...

Page 19: ...prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in...

Page 20: ...ice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertis...

Reviews: