EMAC PCA-6782, User Manual

Page: 42 / 96

31 PCA-6782 User Manual
Chapter 3
A
MI BIOS
Setup
3.3.1 CPU Configuration
Figure 3.4 CPU Configuration Settings
! Max CPUID Value Limit
This is disabled for Windows XP.
! Execute Disable Bit
This item specifies the Execute Disable Bit Feature. The settings are Enabled
and Disabled. The Optimal and Fail-Safe default setting is Enabled. If Disabled
is selected, the BIOS forces the XD feature flag to always return to 0.
! Hyper-Threading Technology
While using a CPU with Hyper-Threading technology, you can select "Enabled"
to enable Hyper-Threading Technology in an OS which supports Hyper-Thread-
ing Technology or select "Disabled" for other OSs which do not support Hyper-
Threading technology.
! Intel® SpeedStep TM tech
Intel SpeedStep Technology centralizes the control mechanism in the proces-
sor, eliminating the need for coordination with the chipset during the frequency/
voltage configuration. This option is used to enable/disable the GV3 bit.
!
Intel® C-STATE tech
Intel® CPU Enhanced Halt (C1E) function, a function to save CPU power con-
sumption in system halt state. When enabled, the CPU speed and voltage will
be reduced during system halt state to save power consumption. You may
choose to enable or disable it.