System Self-Test
2-21
At power-up or reset, each memory module executes a self-test designed to
test and initialize its RAMs. The self-test performs a quick scan of the
DRAM array and records sections of the array that contain defective loca-
tions. These sections will eventually be mapped out by the console and
will no longer be included in the console bitmap. The operating system
uses this bitmap to determine which memory to use and not to use.
The memory self-test does not provide a pass/fail status. The module LED
indicates only that self-test completed. The length of testing depends on
the size of the memory array.
In Example 2-5:
1
The failure reported at ST1 indicates that the memory module at node
7 is unable to complete its on-board self-test. Consequently, the self-
test LED on the memory module remains unlit.
2
The CPU/memory tests are run on the passing memory at node 6. The
failed memory at node 7 is not used during this testing. The ST2 line
indicates that both processors and one memory module passed the
CPU/memory test.
3
The failing memory is not used during ST3 testing. The minus sign
appears only to identify the memory as a failing FRU.
4
The memories at nodes 6 and 7 are configured in the system. The
memory at node 7, however, failed during ST1 and is put in an inter-
leave set of its own.