DigiPoS PowerPoS Technical Manual
Details Cont.
Feature Options
Description
P2C/C2P Concurrency
Disabled
Enabled
The BIOS feature allows PCI-to-CPU and CPU-to-
PCI traffic to occur concurrently. This means PCI
traffic to the CPU and CPU traffic to the PCI bus can
occur simultaneously.
Fast R-W Turn Around
Disabled
Enabled
When the memory controller receives a write
command immediately after a read command, an
additional period of delay is normally introduced
before the write command is actually initiated.
T
his
BIOS feature allows you to skip that delay. This
improves the write performance of the memory
subsystem.
System BIOS Cacheable
Disabled
Enabled
Selecting
Enabled
allows caching of the system
BIOS ROM at F0000h-FFFFFh, resulting in better
system performance. However, if any program
writes to this memory area, a system error may
result.
Video RAM Cacheable
Enabled
Disabled
Selecting
Enabled
allows caching of the system
BIOS ROM at C0000h-F7FFFh, resulting in better
system performance. However, if any program
writes to this memory area, a system error may
result.
Frame Buffer Size
2M
4M
8M
This setting dictates how much memory the onboard
AGP video controller will use. This is not additional
memory but is instead ‘shared’ from the main
memory.
AGP Aperture Size
128M
64M
32M
16M
8M
4M
The AGP Aperture is a portion of the PCI memory
address range dedicated for graphics memory
address space. Cycles that hit the aperture range
are sent to the AGP without translation.
See
for APG information.
Disk On Chip Control
Enabled
Disabled
Reserved Function
Do Not Alter
Onboard LAN Control
Enabled
Disabled
Enables or Disables the onboard network card.
Power Supply Type
AT
ATX
Always set to AT
OnChip USB
Enabled
Disabled
Select
Enabled
if you have USB peripherals.
USB Keyboard Support
Enabled
Disabled
Enables the use of a USB Keyboard (Standard
functions only) outside of an operating system.
OnChip Sound
Enabled
Disabled
Enables or disables the onboard audio
CPU to PCI Write Buffer
Enabled
Disabled
Enable/ disable PCI post write buffer.
PCI Dynamic Bursting
Enabled
Disabled
Enable/ disable PCI Dynamic Bursting
PCI Master 0 WS Write
Enabled
Disabled
Set as Enabled
PCI Delay Transaction
Enabled
Disabled
Set as Disabled
Page 54 of 82