Digi Errata NS9750B-A1 Quick Start Manual Download Page 2

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N S 9 7 5 0 B - A 1   E r r a t a ,   R e v .   F     0 9 / 2 0 0 6

S P I   s l a v e   d a t a   o u t p u t   h i g h   i m p e d a n c e   c o n t r o l

SPI slave data output high impedance control

There is a problem that occurs in slave mode when there are other slaves on the SPI bus. When the 
slave select signal is de-asserted, the data output pin fails to go into a high impedance state and 
interferes with any other slave that is trying to drive the data signal.

Workaround: Do this for each SPI port. Externally buffer the data_out signal with a tri-state buffer 
and connect the select signal to the active low tri-state control pin. There should be a pullup 
resistor on the output of the buffer to prevent floating when no slaves are selected. 

Example:

UART gap timer

The start bit of a new character may not be detected when the character or buffer gap timer 
expires. Framing, parity, or data corruption occur when a start bit is missed.

Software workaround: Three conditions have been identified for this erratum:

„

Applications with a steady stream of receive data are not affected if the buffer gap timer is 
disabled.

„

Applications where the gap between characters is fixed and the character gap timer period is 
configured to be less than the fixed period. The buffer gap timer must be disabled.

„

Applications that have higher-level protocol error detection and recovery such as PPP can use 
both the buffer and character gap timers.

Hardware workaround: 

Note:

The hardware workaround requires that you have installed the appropriate software patch 
found in the NETOS SW Toolkit (on the Web).

A hardware workaround eliminates the possibility of receiving a start bit when a character or buffer 
gap timer is expiring. The workaround drives the baud clock off-chip and synchronizes the incoming 
data with this clock. As a result, the buffer and character gap timers and the next start bit have a 
fixed and known relationship with each other. 

slave_select_n

( from ASIC ) dout

dout ( to bus )

Summary of Contents for Errata NS9750B-A1

Page 1: ...ch 2006 Technical Support Phone 1 877 912 3444 Web techpubs digi com SPI slave data output high impedance control UART gap timer UART CTS related transmit data errors USB OVR and USB PWR PCI arbiter s...

Page 2: ...rruption occur when a start bit is missed Software workaround Three conditions have been identified for this erratum Applications with a steady stream of receive data are not affected if the buffer ga...

Page 3: ...pin on each UART This function is controlled by the RXEXT bit 27 in each Serial Bit rate register If multiple UARTs are running at the same baud rate one baud clock can be used for the multiple UARTs...

Page 4: ...of this signal cannot be changed It is true high normally requiring an external inverter and noise filter to prevent false indications of over current This table shows the corrections to GPIO 16 in t...

Page 5: ...data FIFO overflow Ethernet receiver stall The Ethernet receiver intermittently locks up in 100 Mbps half duplex applications due to an overflow in the RX data FIFO Workaround Reset the RX Ethernet lo...

Page 6: ...TXBD RAM Workaround Software keeps a shadow copy of the TXBD RAM flags in main memory and updates the copy only when the CPU accesses the TXBD RAM When the CPU receives an Ethernet TX ERROR interrupt...

Page 7: ......

Page 8: ...and other countries worldwide All other trademarks are the property of their respective owners Information in this manual is subject to change without notice and does not represent a commitment on th...

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