Hercules-EBX CPU User Manual V1.02
Page 57
Page 1
Base +
Write Function
Read Function
24
PWM data register LSB
PWM data register LSB
25
PWM data register CSB
PWM data register CSB
26
PWM data register MSB
PWM data register MSB
27
PWM configuration register
-
28
(Autocal) EEPROM / TrimDAC Data
(Autocal) EEPROM / TrimDAC Data
29
(Autocal) EEPROM / TrimDAC Address) (Autocal) EEPROM / TrimDAC Address
30
(Autocal) Calibration Control register
(Autocal) Calibration Status register
31
(Autocal) EEPROM Access Key Register FPGA Revision Code
Page 2
Base +
Write Function
Read Function
24
D/A waveform (future)
Feature ID register – A/D
25
D/A waveform (future)
Feature ID register – D/A
26
D/A waveform (future)
Feature ID register – DIO
27
D/A waveform (future)
Feature ID register – Ctr/timers
28
D/A waveform (future)
Device ID register
29
D/A waveform (future)
Device ID register
30
-
-
31
-
-
When pages 1 or 2 are enabled, the page 0 registers at addresses 0-23 are still accessible.
Page 3
Page 3 is a 27-byte page occupying locations 1-27 of the chip. This page contains a copyright
notice in ASCII format.
In page 3, the RESET command and page register at base + 0 are still accessible, so the chip
may be reset or the page may be changed.
