Dialog Semiconductor DA1469 PRO series, User Manual

Page: 20 / 22

UM-B-093
DA1469x PRO Development Kit
User Manual Revision 1.1 19-Feb-2019
CFR0012 20 of 22 © 2019 Dialog Semiconductor
TP Name on Reference
Design
Signal Name Comments
TP54 SWCLK SEGGER Clock
TP56 C_TRIG Software trigger for SmartSnippets Toolbox
TP57 V30 3.0 V
TP58 OSC_EN Enable for ADC clock
TP59 BCBUS7 Aux I/O from FTDI
TP60 VOUT2 Current measurement output (low scale)
TP61 SEL ADC control from FTDI
TP62 VS+ Current measurement sense+
TP63 VS- Current measurement sense-
TP64 BCBUS5 Aux I/O from FTDI
Table 6: Daughterboard Test Points
TP Name on
Reference Design
Signal Name Comments
Position on Daughter
Board
TP1 V18 1.8 V ± 5% top
TP2 FCS Flash chip select top
TP3 VBUS 5.0 V ± 5% (output of OVP circuit) top
TP4 V30 3.0 V ± 2% top
TP5 V18 1.8 V ± 5% bottom
TP6 V18P 1.8 V ± 5% bottom
TP7 V14 1.4 V ± 5% bottom
TP8 V12 1.2 V ± 5% bottom
TP9 VBAT Battery (default LDO 3.0 V ± 2%) top
TP12 GND bottom
TP13 GND top
TP14 GND bottom
TP15 VBUS_IN 5.0 V ± 5% (from USB, before OVP) top
TP16 VBATn VBAT pin (default LDO 3.0 V ± 2 %) bottom
TP17 VBUSn 5.0 V ± 5% (to DA1469x pin) bottom
TP18 VLED LED power (VBUS or VBAT - 0.2 V) bottom
TP20 GND top
TP21 V18 VFLASH 1.8 V ± 5% bottom