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UM-B-093

DA1469x PRO Development Kit

User Manual

Revision 1.1

19-Feb-2019

CFR0012

16 of 22

Figure 20: Mainboard/Daughterboard Alignment

3.11 GPIO Assignments

Table 3: Mainboard/Daughterboard Pin Assignment

Pin Name

DK Function

Comments

P0_0

QSPIR_D0

QSPI RAM for parallel LCD framebuffer.

1.8 V only.

P0_1

QSPIR_D1

P0_2

QSPIR_D2

P0_3

QSPIR_D3

P0_4

QSPIR_CSn

P0_5

QSPIR_CLK

P0_6

GP_BUTT

P0_7

UCTS

P0_8

URXD

P0_9

UTXD

P0_10

M33 SWDIO

P0_11

M33 SWCLK

P0_12

P0_13

P0_14

USB_DP

Daughterboard USB

P0_15

USB_DM

P0_16

C_TRIG

software trigger

P0_17

P0_18

P0_19

P0_20

P0_21

P0_22

XTAL32km

Daughterboard xtal 32.768kHz

P0_23

XTAL32kp

P0_24

P0_25

P0_26

Summary of Contents for DA1469 PRO series

Page 1: ...anual DA1469x PRO Development Kit UM B 093 Abstract DA1469x Development Kit Pro hardware provides a tested reference platform access to all signals for connecting peripherals and advanced debugging fe...

Page 2: ...peration 18 3 14 Test Section 18 Revision History 21 Figures Figure 1 System Block Diagram 5 Figure 2 DA1469x DK PRO Mainboard Breakout Headers 6 Figure 3 VBAT Adjustable LDO 6 Figure 4 DIP Switch 7 F...

Page 3: ...conductor Tables Table 1 Signals with Level Translation 14 Table 2 Mainboard Daughterboard Mating Connectors 15 Table 3 Mainboard Daughterboard Pin Assignment 16 Table 4 Default Jumper Settings 18 Tab...

Page 4: ...cification QSPI Quad Serial Peripheral Interface RF Radio Frequency RFIO Radio Frequency Input Output SDK SW Development Kit SIMO Single Inductor Multiple Output SOC System on Chip SPI Serial Peripher...

Page 5: ...s from DA1458x DA1468x product lines When combined with the DA1469x SDK and SmartSnippets tools the DA1469x DK PRO provides an easy to use and complete platform for software hardware development 3 2 F...

Page 6: ...tor driver pins One user button K1 connected to a GPIO through a jumper LDO adjustable from 1 8 V up to 4 2 V to supply the VBAT pin default 3 0 V Figure 3 VBAT Adjustable LDO P1_1 P1_0 P1_7 P1_6 P1_5...

Page 7: ...n all signals connected to the related DA1469x pins Signal names are marked on PCB top silkscreen Figure 4 DIP Switch Test points TP for automated production test placed on the bottom of the board Gro...

Page 8: ...lternative power option and connects to DA1469x USB data pins 5 Power selector switch LDO or battery 6 Header for current measurement circuit input J9 1 2 7 Header for current measurement circuit outp...

Page 9: ...tively QSPI Flash SOIC 8 or USON 8 package the default of which is W25Q80EWSNIG 8 Mbit U2 Printed RF antenna ANT1 Coaxial switch for conducted RF measurements J7 Reset button K1 RESET USB connector fo...

Page 10: ..._IN SW1 SW_MA12R_TR 3 2 1 6 7 8 9 J6 53261 0271 1 2 3 4 LiPO VBAT D6 ACPDQC24VE HF 2 1 BT1 NP COIN P1_15 P1_7 P1_2 P1_1 P1_22 P1_21 P1_20 P1_19 P1_18 P1_13 P1_12 P1_10 P1_9 P1_6 P1_11 P1_14 P1_17 P1_1...

Page 11: ...sen the SmartSnippets Toolbox measurement will exclude the LED current Figure 13 LED Powering Circuit ESD protection diodes at the most susceptible points USB connector J3 CIB interface J4 and power s...

Page 12: ...e in all other cases from 1 A to 250 mA 3 8 DA1469x PRO DK Power Block Diagram Figure 14 DA1469x PRO DK Power Distribution Diagram USB on the daughterboard feeding VBUS pin Li ion Li Po coin battery o...

Page 13: ...on need a clean 5 0 V power supply Figure 17 This is generated by a step up regulator U18 which generates 6 0 V and U18 is followed by a 5 V LDO U17 U18 is also controlled by PWR_ENABLED Figure 17 Op...

Page 14: ...epending on the battery level and setting for the I OLDO V30 For example if the other side on board interfaces JTAG UART is fixed at 3 3 V there is a leakage through the pins if the DA1469x voltage I...

Page 15: ...nnectors Main Board Daughter Board Amphenol FCI 10132797 055100LF Amphenol FCI 10132798 052100LF NOTE The connectors have no polarity feature so please be careful not to connect the daughterboard rota...

Page 16: ...in Name DK Function Comments P0_0 QSPIR_D0 QSPI RAM for parallel LCD framebuffer 1 8 V only P0_1 QSPIR_D1 P0_2 QSPIR_D2 P0_3 QSPIR_D3 P0_4 QSPIR_CSn P0_5 QSPIR_CLK P0_6 GP_BUTT P0_7 UCTS P0_8 URXD P0_...

Page 17: ...1_19 P1_20 P1_21 P1_22 LED1 RGB LED BLUE Daughterboard LED LED2 RGB LED GREEN HDRVP J10 HEADER LRA ERM motor driving pins HDRVM RSTn RESET active low Daughterboard button Note 1 USB and XTAL32k signal...

Page 18: ...switch S1 has all individual segments set to the ON position by default 3 13 QSPI RAM Operation QSPI RAM may be used in applications where we need bulk data transfers with DMA The most common case is...

Page 19: ...k TP18 VREG 1 8 V FTDI TP19 VBUS2 5 V USB TP20 PWR_EN Enable for most LDOs TP23 3V3 3 3 V USB hub TP24 GND TP25 GND TP26 GND TP27 GND TP30 RSTn RESETn from db TP31 V12 1 2 V from db TP32 V14 1 4 V fro...

Page 20: ...t sense TP64 BCBUS5 Aux I O from FTDI Table 6 Daughterboard Test Points TP Name on Reference Design Signal Name Comments Position on Daughter Board TP1 V18 1 8 V 5 top TP2 FCS Flash chip select top TP...

Page 21: ...Semiconductor Revision History Revision Date Description 1 1 19 Feb 2019 To be released with DA1469x Pro DKs Change details Update document title to DA1469x PRO Development Kit Removed reference to B...

Page 22: ...or modification is the sole responsibility of the customer and Dialog Semiconductor excludes all liability in this respect Customer notes that nothing in this document may be construed as a license fo...

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