27
User's Manual |
CS620-H310
Chapter 2
HARDWARE INSTALLATION
1
DDR4_1
DDR4_2
Socket LGA1151
+12V Power
4
8
1
5
CPU
FAN
1
Battery
PCIe 2 (PCIe x4)
PCI 3
PCI 1
PCI 4
PCI 2
Intel
I211AT
1
2
10
1
JP5
1
13
12
24
1
SPI Flash
BIOS
1
1
1
1
1
PCIe 1 (PCIe x16)
JP21
1
System
Fan 1
1
System Fan 3
SATA 1
SATA 0
SATA 3
SATA 2
Realtek
ALC887
1
6
1
2
20
19
JP18/19/17
Intel
H310
1
9
2
Intel I219V
1
TSJP1
TSJP2
1
1
TSJP3
TSJP4
ISA 1
ISA 2
J36
J35
J37
SOJ1
J12 SMBus
2
5
3 3 3
1
9
2
1
9
2
1
9
2
1
9
2
1
9
2
1
24
13
mSATA /
Mini PCIe
6 2 6 2
6 2 6 2
TSJP5
TSJP7
2
1
9
10
2
1
9
10
1
1
2
13
14
Buzzer
6
1
LPC
1
2
7
8
1
2
11
12
1
DDR4_1
DDR4_2
Socket LGA1151
+12V Power
4
8
1
5
CPU
FAN
1
Battery
PCIe 2 (PCIe x4)
PCI 3
PCI 1
PCI 4
PCI 2
Intel
I211AT
1
2
10
1
JP5
1
13
12
24
1
SPI Flash
BIOS
1
1
1
1
1
PCIe 1 (PCIe x16)
JP21
1
System
Fan 1
1
System Fan 3
SATA 1
SATA 0
SATA 3
SATA 2
Realtek
ALC887
1
6
1
2
20
19
JP18/19/17
Intel
H310
1
9
2
Intel I219V
1
TSJP1
TSJP2
1
1
TSJP3
TSJP4
ISA 1
ISA 2
J36
J35
J37
SOJ1
J12 SMBus
2
5
3 3 3
1
9
2
1
9
2
1
9
2
1
9
2
1
9
2
1
24
13
mSATA /
Mini PCIe
6 2 6 2
6 2 6 2
TSJP5
TSJP7
2
1
9
10
2
1
9
10
1
1
2
13
14
Buzzer
6
1
LPC
1
2
7
8
1
2
11
12
The lithium ion battery addendum supplies power to the real-time clock and CMOS memory
as an auxiliary source of power when the main power is shut off. Insert a coin cell battery into
the holder and make sure the polarities are correctly oriented — the cap side (rimmed rounded
edge) is negative and should be facing the holder; the flat side with a + mark is positive and
should be facing away from the holder.
Safety Measures
• There exists explosion hazard if the battery is incorrectly installed.
• Replace only with the same or equivalent type recommended by the manufacturer.
• Dispose of used batteries according to local ordinances.
Battery Holder
Battery
X
Internal I/O Connectors
SMBus
The SMBus (System Management Bus) connector is used to connect the SMBus device. It is a
multiple device bus that allows multiple chips to connect to the same bus and enable each one
to act as a master by initiating data transfer.
SMBus Pin Assignment
Pin Assignment
Pin Assignment
1
3V3DU
2
GND
3
SMBus_Clock
4
SMBus_DATA
5
SMBus_Alert
6
---
SMBus
X
Internal I/O Connectors
1
5
2
