48
3
Award BIOS Setup Utility
Disabled
Uses x64 PC SDRAM DIMM.
Enabled
This option allows the system to recover from memory
failure. It detects single-bit and multiple-bit errors, then
automatically corrects single-bit error.
Super Bypass Mode
The default is Disabled. When Enabled, the chip allows low-latency
accesses to memory. However, memory incompatibility may occur. If
the system becomes unstable after enabling this function, set this field
to Disabled.
SDRAM Timing setting by
SDRAM timing is controlled by the DRAM Timing Registers. The
timings programmed into this register are dependent on the system
design. Slower rates may be required in certain system designs to
support loose layout or slower memory. When this field is set to
Auto, the system will automatically set the SDRAM timing. If you
leave this field in its default setting - Manual, the following fields can
be configured.
SDRAM PH Limit
This field is used to specify the number of consecutive page-hit requests
allowed before choosing a non-page-hit request.
SDRAM Idle Limit
This field is used to specify the number of idle cycles before precharging
an idle bank.
SDRAM Trc Timing Value
This field is used to specify the minimum time from activate to activate
in the same bank.
SDRAM Trp Timing Value
This field is used to specify the delay time from precharge command
to activate command.
