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2.4 TRANSMITTER ENABLE AND SUB-SYS FLAG INPUTS
Defintions
JP11-Enables/disables Transmitter “A
JP12-Enables/disables Transmitter “B
JP13-Enables/disables Sub-sys Flag Input
The Factory default configuration for having both transmitters enabled and the SSF disabled is shown
below:
TXB SSF TXA
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•
•
•
•
•
•
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•
JP12 JP13 JP11
2.5
MASTER RESET AND IRQ JUMPERS
Definitions
(Ref:Reset/IRQ circuit below)
JP4---This jumper determines whether or not an External INTA is allowed from the
PCI bus.
JP14--This jumper determines whether or not a resistor (300 ohms) is allowed
in series with the Master Reset line.
JP6---This jumper determines whether or not an External Reset is allowed from the
PCI bus.
JP8---This jumper determines whether 3.3v or 5.0v is used to pull up the reset line if
desired.
JP8---This jumper determines whether or not C3 (.01uf) is needed for filtering on the
reset line.
