Passport 2®/Passport 2 LT™ Service Manual
0070-10-0441
2 - 43
Theory of Operation
NEC 10.4” Display/Keypad Interface Board
2.14
NEC 10.4” Display/Keypad Interface Board
Overview
This board provides interface and support for the 10.4” NEC Display, an SPI interface to a 4
X 8 matrix keypad, optical encoder and LED’s. It provides connections for an external
speaker and inverter for the display.
2.14.1
Video Display Interface
The video data, control signals, and display logic power are supplied to the display via the
J5 connector. The video data and control signals are generated by the video controller IC on
the CPU board (0670-00-0674) and input to buffer/line driver ICs (U7 & U8). These ICs
have 3.3V/5V logic compatible.
inputs, and 5V logic compatible outputs. These buffer/line drivers provide the proper logic
levels to the display regardless of the setting of the video processor’s LCD interface, and
ensure proper drive capability. Each video data and control signal line then passes through
an RC low pass filter designed to match line impedance and thus reduce ringing.
There are two display ID signals going to the CPU board connector, labeled VIDSEL1 and
VIDSEL2. This generates the bit pattern for the NEC 10.4” display per the following chart:
The 3.3V supply power to the display is filtered by a LC low pass filter made up of L4 and
C64. The goal of the low pass filter is to prevent the display’s operating frequency from
contaminating the 3.3V line. C59 was chosen for it’s low ESR and Ripple Current
characteristics with the capacitance value being a secondary consideration. C61 was
chosen for storing an amount of charge in order to maintain the voltage level for the LCD
logic.
2.14.2
TFT Inverter Interface
The inverter for the TFT display is connected to connector J3. The inverter is powered by
fi12V2 voltage and is turned on and off using the output of a monostable timer driven
from an astable timer. By varying the duty cycle of the monostable timer, the brightness of the
display is controlled. The higher the duty cycle, the brighter the display is, the lower the duty
cycle, the dimmer the display is.
The +12V2 voltage to the inverter is filtered by a LC low pass filter made up of L3 and C20.
The goal of the low pass filter is to prevent the inverter’s operating frequency from
contaminating the +12V2 line. Capacitors C57 and C58 were chosen for their low ESR and
ripple current characteristics, with the capacitance value being a secondary consideration.
TYPE
VIDSEL1
VIDSEL2
NEC 10.4” Display
1
0
