Chapter 3
Hardware Overview
PCI-MIO E Series User Manual
3-2
©
National Instruments Corporation
Figure 3-2 shows a block diagram for the PCI-MIO-16XE-10.
Figure 3-2. PCI-MIO-16XE-10 Block Diagram
Timing
PFI / Trigger
I/O Connector
3
2
2
RTSI Bus
Digital I/O (8)
16-Bit
Sampling
A/D
Converter
Configuration
Memory
REF
Buffer
+
Programmable
Gain
Amplifier
–
Calibration
Mux
Mux Mode
Selection
Switches
Analog
Muxes
Voltage
REF
Calibration
DACs
4
Calibration
DACs
DAC0
DAC1
DAQ - STC
Analog Input
Timing/Control
Analog Output
Timing/Control
Digital I/O
Trigger
Counter/
Timing I/O
RTSI Bus
Interface
DMA/
Interrupt
Request
Bus
Interface
(8)
(8)
AI Control
IRQ
DMA
AO Control
DAC
FIFO
Data (16)
Trigger Level
DACs
Analog
Trigger
Circuitry
Data (16)
ADC
FIFO
Trigger
PCI Bus
EEPROM
Address/Data
Control
Data (16)
Analog
Input
Control
EEPROM
Control
DMA
Interface
MIO
Interface
DAQ-STC
Bus
Interface
Analog
Output
Control
I/O
Bus
Interface
MITE
Generic
Bus
Interface
PCI
Bus
Interface
Address (5)
