Dalsa Xtium-CL PX4 User Manual Download Page 10

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Overview

Xtium-CL PX4 User's Manual

DTE: Intelligent Data Transfer Engine

The Xtium-CL PX4 intelligent Data Transfer Engine ensures fast image data transfers between the

board and the host computer with zero CPU usage. The DTE provides a high degree of data

integrity during continuous image acquisition in a non-real time operating system like Windows.

DTE consists of multiple independent DMA units, Tap Descriptor Tables, and Auto-loading Scatter-

Gather tables.

PCI Express x4 Gen2 Interface

The Xtium-CL PX4 is a universal PCI Express x4 Gen2 board, compliant with the PCI Express 2.0

specification. The Xtium-CL PX4 board achieves transfer rates up to 1.8Gbytes/sec. to host

memory. Note that performance can be lower depending on PC and/or programmed configuration.
The Xtium-CL PX4 board occupies one PCI Express x4 Gen2 expansion slot and one chassis

opening.

Important:

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To obtain maximum transfer rate to host memory, make sure the Xtium-CL PX4 is in a Gen2

slot. Although the board will work in a Gen1 slot, only half the performance is achieved.

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If the computer only has a PCI Express x16 slot, test directly or review the computer

documentation to know if the Xtium-CL PX4 is supported. Many computer motherboards only

support x16 products in x16 slots, which are commonly graphic video boards.

Advanced Controls Overview

Visual Indicators

Xtium-CL PX4 features 3 LED indicators to facilitate system installation and setup. These indicators

provide visual feedback on the board status and camera status.

External Event Synchronization

Trigger inputs and strobe signals precisely synchronize image captures with external events.

Camera Link Communications Ports

One PC independent communication port provides Camera Link camera configuration. This port

does not require addition PC resources like free interrupts or I/O address space. Accessible via the

board device driver, the communication port presents a seamless interface to Windows-based

standard communication applications like HyperTerminal, etc. The communication port is accessible

directly from the Camera Link connectors.

Quadrature Shaft Encoder

An important feature for web scanning applications, the Quadrature Shaft Encoder inputs allow

synchronized line captures from external web encoders. The Xtium-CL PX4 provides an RS-422

input that supports a tick rate of up to 5 MHz.

Summary of Contents for Xtium-CL PX4

Page 1: ...Xtium CL PX4 User s Manual Edition 1 11 P N OC Y4CM PUSR0 www teledynedalsa com sensors cameras frame grabbers processors software vision solutions ...

Page 2: ...tered trademark Windows Windows 7 Windows 8 are trademarks of Microsoft Corporation All other trademarks or intellectual property mentioned herein belongs to their respective owners Edition 1 11 released on February 8 2016 Document Number OC Y4CM PUSR0 Printed in Canada About Teledyne DALSA Teledyne DALSA is an international high performance semiconductor and electronics company that designs devel...

Page 3: ...esponse File 13 Running a Silent Mode Installation 13 Silent Mode Uninstall 14 Creating a Response File 14 Running a Silent Mode Uninstall 14 Silent Mode Installation Return Code 14 Installation Setup with CorAppLauncher exe 14 Custom Driver Installation using install ini 15 Creating the install ini File 15 Run the Installation using install ini 15 UPGRADING SAPERA OR BOARD DRIVER 16 Board Driver ...

Page 4: ... 34 Using the Grab Demo 34 XTIUM CL PX4 REFERENCE 36 BLOCK DIAGRAM 36 XTIUM CL FLOW DIAGRAM 37 ACQUISITION TIMING 38 LINE TRIGGER SOURCE SELECTION FOR LINE SCAN APPLICATIONS 39 Parameter Values Specific to the Xtium CL PX4 39 SHAFT ENCODER INTERFACE TIMING 39 VIRTUAL FRAME TRIGGER FOR LINE SCAN CAMERAS 41 Synchronization Signals for a 10 Line Virtual Frame 41 SAPERA ACQUISITION METHODS 43 TRIGGER ...

Page 5: ...necting External Receivers to the General Outputs 73 External Receiver Electrical Requirements 73 Note 3 RS 422 Shaft Encoder Input Specifications 74 Note 3 1 Interfacing to an RS 422 Driver Output 75 Note 3 2 Interfacing to a TTL also called Push Pull Output 75 Note 3 3 Interfacing to a Line Driver also called Open Emitter Output 76 Note 3 4 Interfacing to an Open Collector Output 76 J5 Multi Boa...

Page 6: ...abilities 56 Table 14 Transfer Related Parameters 56 Table 15 GIO 0 Related Capabilities 56 Table 16 GIO 0 Related Parameters 57 Table 17 GIO 1 Related Capabilities 57 Table 18 GIO 1 Related Parameters 57 Table 19 GIO 2 Related Capabilities 57 Table 20 GIO 2 Related Parameters 58 Table 13 Xtium CL PX4 Servers and Resources 58 Table 14 Board Specifications 61 Table 15 Environment Specifications 61 ...

Page 7: ...36 Figure 16 Acquisition Timing 38 Figure 17 Encoder Input with Pulse drop Counter 40 Figure 18 Using Shaft Encoder Direction Parameter 40 Figure 19 Synchronization Signals for a 10 Line Virtual Frame 42 Figure 20 EMI Certifications 62 Figure 21 Board Layout 63 Figure 22 End Bracket Details 64 Figure 23 CamExpert Camera Link Controls 68 Figure 24 General Inputs Electrical Diagram 69 Figure 25 Exte...

Page 8: ...mized image processing routines Contact Sales at Teledyne DALSA Table 2 Xtium CL PX4 Software Product Numbers Optional Xtium CL PX4 Cables Accessories Item Product Number DH60 27S cable assembly to blunt end 6 ft cable I O 27 pin Hirose connector to blunt end This cable assembly connects to J1 see J1 External Signals Connector Female DH60 27P on page 69 OR YXCC 27BE2M1 Rev B1 DH40 27S Connector Ki...

Page 9: ... One Full Camera Link Input with up to 8 Taps parallel installation default selection Support for 1 Base 1 Medium or 1 Full Camera Link camera 1 tap segmented 2 taps alternate or 2 3 4 8 taps parallel monochrome Support for 1 Base or 1 Medium Camera Link camera 1 tap and 2 taps parallel RGB One Full Camera Link Bayer Input with up to 8 Taps parallel Support for 1 Base 1 Medium or 1 Full Camera Lin...

Page 10: ...ly has a PCI Express x16 slot test directly or review the computer documentation to know if the Xtium CL PX4 is supported Many computer motherboards only support x16 products in x16 slots which are commonly graphic video boards Advanced Controls Overview Visual Indicators Xtium CL PX4 features 3 LED indicators to facilitate system installation and setup These indicators provide visual feedback on ...

Page 11: ...xible display functionality and management plus easy to use application development wizards Applications are developed using either C or NET frameworks Sapera LT comes bundled with CamExpert an easy to use camera configuration utility to create new or modify existing camera configuration files Sapera Processing Library Sapera Processing is a comprehensive set of C classes or NET classes for image ...

Page 12: ...ters Close the computer chassis and turn the computer on Logon to the workstation as administrator or with an account that has administrator privileges Windows will find the Xtium CL PX4 and start its Found New Hardware Wizard Click on the Cancel button to close the Wizard Sapera LT Library Xtium CL PX4 Driver Installation Insert the Teledyne DALSA Sapera Essential CD ROM If AUTORUN is enabled on ...

Page 13: ... the system all are updated with new firmware If any installed Xtium CL PX4 board installed in a system already has the correct firmware version an update is not required In the following screen shot a single Xtium CL PX4 Full board is installed and ready for a firmware upgrade Figure 1 Automatic Firmware Update Firmware Update Manual Mode Select Manual mode to load firmware other then the default...

Page 14: ...he Start Menu If required the Xtium CL PX4 Firmware Loader program is executed via the Windows Start Menu shortcut Start Programs Teledyne DALSA Xtium CL PX4 Driver Firmware Update A firmware change after installation would be required to select a different configuration mode See User Programmable Configurations on page 7 ...

Page 15: ...iver installation to proceed without the need for mouse clicks or other input from a user Preparing a Silent Mode Installation requires two steps Prepare the response file which emulates a user Invoke the device driver installer with command options to use the prepared response file Creating a Response File Create the installer response file by performing a device driver installation with a comman...

Page 16: ... status of the installation A value of 1 indicates that the installation has started and a value of 2 indicates that the installation has terminated A silent mode installation also creates a log file setup log which by default is created in the same directory and with the same name except for the extension as the response file The f2 option enables you to specify an alternative log file location a...

Page 17: ...stall the driver in the target computer All Xtium CL PX4 boards required in the system must be installed Configure each board s acquisition firmware using the Teledyne DALSA Device Manager tool see Device Manager Board Viewer If a standard Serial COM port is required for any board use the Sapera Configuration tool see COM Port Assignment When each board setup is complete using the Teledyne DALSA D...

Page 18: ...k Remove Install the new board driver Run Setup exe if installing manually from a downloaded driver file In Windows 8 Windows 10 just type Control Panel while in the start screen or click the arrow in the lower left side to bring up the all applications window Select Programs and Features then double click the Teledyne DALSA Xcelera board driver and click Remove If the new driver is on a Sapera Es...

Page 19: ...era LT application has started Note if the serial communication program can directly select the Xtium CL PX4 serial port then mapping to a system COM port is not necessary When required map the Xtium CL PX4 serial port to an available COM port by using the Sapera Configuration tool Run the program from the Windows start menu Start Programs DALSA Sapera LT Sapera Configuration COM Port Assignment T...

Page 20: ...this report to aid in troubleshooting installation or operational problems Figure 5 Board Information via Device Manager Information Field Description Serial Number Read Only Serial Number of the board Hardware ID Read Only This field will identify future hardware changes that affect the operation of the board Currently there are no such changes Hardware Configuration Read Only This field will sta...

Page 21: ...put level can also be modified at the application level Click on the Value field to open the drop selection box show below Select the input signal level detection required Open Interface GIOs Reservation Read Write Use this field to reserve Open Interface GIOs for use by the acquisition module By default boards are shipped with Open Interface GIOs 1 2 reserved for Board Sync 1 2 Click on the Value...

Page 22: ... Calculate the total amount of host memory used for one frame buffer number of pixels per line number of lines 2 if buffer is 10 12 14 or 16 bits Provide 200 bytes per frame buffer for Sapera buffer resources Provide 64 bytes per frame buffer for metadata Memory for this data is reserved in chunks of 64kB blocks Provide 48 bytes per frame buffer for buffer management Memory for this data is reserv...

Page 23: ...allocated as a single contiguous memory block Windows will limit the allocation dependent on the installed system memory Use the Buffer menu of the Sapera Grab demo program to allocate host buffer memory until an error message signals the limit allowed by the operating system used Contiguous Memory for Sapera Messaging The current value for Sapera messaging determines the total amount of contiguou...

Page 24: ...ence of the pixel clock and an active acquisition The complete status LED descriptions are available in the technical reference section see Status LED Functional Description on page 65 Possible Installation Problems Hardware PCI bus conflict When a new installation produces PCI bus error messages or the board driver does not install it is important to verify that there are no conflicts with other ...

Page 25: ...dth is less than expected on page 29 Troubleshooting Procedures The following sections provide information and solutions to possible Xtium CL PX4 installation and functional problems The previous section of this manual summarizes these topics Checking for PCI Bus Conflicts One of the first items to check when there is a problem with any PCI board is to examine the system PCI configuration and ensu...

Page 26: ...e Save button A file named pcidiag txt is created in the Sapera bin directory with a dump of the PCI configuration registers Email this file when requested by the Teledyne DALSA Technical Support group along with a full description of your computer Figure 7 PCI Diagnostic Program PCI bus info Windows Device Manager An alternative method to confirm the installation of the Xtium CL PX4 board and dri...

Page 27: ...ation but requires a reboot of the computer instead Example Xtium CL_PX4_1 00 00 0000 exe cr Sapera and Hardware Windows Drivers Any problem seen after installation such as an error message running CamExpert first make certain the appropriate Teledyne DALSA drivers have started successfully during the boot sequence Example click on the Start Programs Accessories System Tools System Information Sof...

Page 28: ...ode Driver Information via the Device Manager Program The Device Manager program provides a convenient method of collecting information about the installed Xtium CL PX4 System information such as operating system computer CPU system memory PCI configuration space plus Xtium CL PX4 firmware information is displayed or written to a text file default file name BoardInfo txt Note that this program als...

Page 29: ...e is no interruption to the image acquisition of one buffer by any delays in transfer of the other buffer which contains the previously acquired video frame to system memory If allocation for the requested number of buffers fails the driver will reduce the number of on board frame buffers requested until they can all fit For area scan cameras a minimum of 2 on board frame buffers is needed for pro...

Page 30: ...continuous grab Perform all installation checks described in this section before contacting Technical Support Symptoms Card grabs black You are able to use Sapera CamExpert the displayed frame rate is as expected but the display is always black Set your camera to manual exposure mode and set the exposure to a longer period plus open the lens iris Try to snap one frame instead of continuous grab Ma...

Page 31: ...em motherboard and PCI boards will be unique and must be tested for bandwidth limitations affecting the imaging application Is the Xtium CL PX4 installed in a PCI Express x16 slot Note that some computer s x16 slot may only support non x16 boards at x1 or not at all Check the computer documentation or test an Xtium CL PX4 installation The speed at which the board is running can be viewed using the...

Page 32: ...alog window to select a camera configuration file Even when using the Xtium CL PX4 with common video signals a camera file is required Therefore CamExpert is typically the first Sapera application run after an installation Obviously existing ccf files can be copied to any new board installations when similar cameras are used CamExpert Example with a Monochrome Camera The image below shows CamExper...

Page 33: ...ameters used to select various integration methods frame trigger type Camera Link controls etc External Trigger Parameters to configure the external trigger characteristics Image Buffer and ROI Allows control of the host buffer dimension and format Display An important component of CamExpert is its live acquisition display window which allows immediate verification of timing or control parameters ...

Page 34: ...s to support different image format modes supported by the camera or sensor such as image binning or variable ROI CCF File Details A file using the CCF extension Camera Configuration files is the camera CCA and frame grabber CVI parameters grouped into one file for easier configuration file management This is the default Camera Configuration file used with Sapera LT 5 0 and the CamExpert utility C...

Page 35: ...ra from scratch with CamExpert Confirm that Teledyne DALSA has not already published an application note with camera files www teledynedalsa com Confirm that the correct version or board revision of Xtium CL PX4 is used Confirm that the required firmware is loaded into the Xtium CL PX4 Confirm that Sapera does not already have a cca file for your camera installed on your hard disk If there is a cc...

Page 36: ...o acquire images in continuous or in one time mode while adjusting the acquisition parameters The program code may be extracted for use within your own application Remarks Based on Sapera C classes See the Sapera User s and Reference manuals for more information Table 5 Grab Demo Workspace Details Using the Grab Demo Server Selection Run the grab demo from the start menu Start Programs Sapera LT D...

Page 37: ...erate the camera configuration file based on timing and control parameters entered The CamExpert live acquisition window allows immediate verification of those parameters CamExpert reads both Sapera cca and cvi for backward compatibility with the original Sapera camera files Grab Demo Main Window The Grab Demo program provides basic acquisition control for the selected frame grabber The loaded cam...

Page 38: ...e SDR26 2 CLK 4 Twisted Pairs Data SerDes Receiver CLK FVAL LVAL DVAL SPARE Twisted Pairs 2 Data Grab Controls CLK 4 Data SerDes Receiver CLK FVAL LVAL DVAL SPARE Twisted Pairs 2 Data Grab Controls CLK 4 RX TX Control Dual Shaft Encoder I O Controller 12V 500 mA reset Power Out Power Gnd Indicators LEDs Camera On Grab On Acquisition Status Indicator 1 Acquisition Status Indicator 2 Camera On Grab ...

Page 39: ...Link ports based on the Camera Link configuration selected Memory Stores the video data using the concept of video frames Color Conversion When enabled for particular cameras converts Bayer and Bi Color video data into RGB data White Balance Gain Applies White Balance Gain to RGB data Lookup Tables Applies lookup table transformation to the data going to the host memory Horizontal Flip If present ...

Page 40: ...ive high to acquire camera data 4 Minimum of 1 5 HB Horizontal Blanking Minimum 1 clock cycle Maximum no limits 6 VB Vertical Blanking Minimum 1 line Maximum no limits 7 First Active Pixel unless otherwise specified in the CCA file Horizontal Back invalid x where x defines the number of pixels to be skipped 8 Last Active Pixel defined in the CCA file under Horizontal active y where y is the total ...

Page 41: ...ger Input used as External Shaft Encoder if CORACQ_PRM_EXT_LINE_ TRIGGER_ENABLE true if CORACQ_PRM_SHAFT_ ENCODER_ENABLE true 0 From Shaft Encoder Phase A default From Shaft Encoder Phase A B default 1 From Shaft Encoder Phase A From Shaft Encoder Phase A 2 From Shaft Encoder Phase B From Shaft Encoder Phase B 3 n a From Shaft Encoder Phase A B 4 From Board Sync 1 n a 5 From Board Sync 2 n a Table...

Page 42: ...s example Number of trigger to drop 2 Line acquired Figure 17 Encoder Input with Pulse drop Counter Example using Sequential Encoder Input Support of a dual phase encoder should consider the direction of motion of one phase signal to the other Such a case might exist where system vibrations and or conveyor backlash can cause the encoder to briefly travel backwards The acquisition device must in th...

Page 43: ...hen a level or dual input type is selected controls the number of lines sequentially grabbed up to the maximum of lines in the virtual frame buffer Virtual Frame Trigger Timing Diagram The following timing diagram shows an example of grabbing 10 video lines from a line scan camera and the use of a virtual frame trigger to define when a video line is stored at the beginning of the virtual frame buf...

Page 44: ... External Frame Trigger is enabled If X 0 External Frame Trigger is disabled External Frame Trigger Detection Y where If Y 1 External Frame Trigger is active low If Y 2 External Frame Trigger is active high If Y 4 External Frame Trigger is active on rising edge If Y 8 External Frame Trigger is active on falling edge If Y 32 External Frame Trigger is dual input rising edge If Y 64 External Frame Tr...

Page 45: ...nd user applications With the Xtium CL PX4 applications ensure trigger to image reliability by monitoring events and controlling transfer methods as described below Supported Events and Transfer Methods Listed below are the supported acquisition and transfer events Event monitoring is a major component to the Trigger to Image Reliability framework Acquisition Events Acquisition events pertain to t...

Page 46: ...CORACQ_VAL_EVENT_TYPE_EXT_LINE_TRIGGER_TOO_SLOW Shaft Encoder Reverse Count Overflow Event which indicates that the shaft encoder has travelled in the opposite direction expected and that the number of pulses encountered during that travel has exceeded the acquisition device counter The acquisition device will thus not be able to skip the appropriate number of pulses when the expected direction is...

Page 47: ...ce all images currently in the on board memory are transferred to host buffer memory Note that if the application does not provide enough empty buffers the Xtium event will not occur and an acquisition abort will be required CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_WITH_TRASH Before cycling to the next buffer in the list the transfer device will check the next buffer s state If its state is full the tra...

Page 48: ... bits in 12 LSBs of 16 bit When no LUTs are available or LUTs are disabled the data is packed in the LSBs of the target destination Table 8 Output LUT Availability Xtium CL PX4 Supported Parameters The tables below describe the Sapera capabilities supported by the Xtium CL PX4 Unless specified each capability applies to all configuration modes and all acquisition modes The information here is subj...

Page 49: ...mat CORDATA_FORMAT_MONO8 8 bits LUT 1 LUT format CORDATA_FORMAT_MONO16 10 bits LUT 1 LUT format CORDATA_FORMATMONO8 10 bits LUT 1 LUT format CORDATA_FORMATMONO16 8 bits LUT 1 LUT format CORDATA_FORMAT_COLORNI8 10 bits LUT 1 LUT format CORDATA_FORMAT_COLORNI8 10 bits LUT 1 LUT format CORDATA_FORMAT_COLORNI10 10 bits LUT 1 LUT format CORDATA_FORMAT_COLORNI16 12 bits LUT 1 LUT format CORDATA_FORMAT_C...

Page 50: ...Mono 10T8B Mono 8T10B Mono Color RGB Full Bayer Full Packed RGB 80B Packed RGB 80B Packed Bi Color 10T8B Bayer 8T10B Bayer Default Area Scan 1 tap Mono Default Area Scan 10 taps Parallel Mono Default Area Scan 8 taps Parallel Mono Default Area Scan 1 tap Color Default Bayer Area Scan 1 tap Color Default Area Scan Full Packed RGB Default Area Scan 80 bit Packed RGB Default Area Scan 80 bit Packed B...

Page 51: ..._DIRECTION_FROM_TOP 0x10 CORACQ_PRM_TAP_7_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR 0x1 CORACQ_VAL_TAP_DIRECTION_UD 0x4 CORACQ_VAL_TAP_DIRECTION_FROM_TOP 0x10 CORACQ_PRM_TAP_8_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR 0x1 CORACQ_VAL_TAP_DIRECTION_UD 0x4 CORACQ_VAL_TAP_DIRECTION_FROM_TOP 0x10 CORACQ_PRM_PIXEL_CLK_DETECTION CORACQ_VAL_RISING_EDGE 0x4 CORACQ_PRM_CHANNELS_ORDER CORACQ_VAL_CHANNELS_ORDER_NORMA...

Page 52: ..._FLAG_BGR 0x80000000 CORACQ_VAL_CAMLINK_CONFIGURATION_80BITS_PACKED 0x200 CORACQ_PRM_DATA_VALID_ENABLE Full Mono Medium Color RGB Full Packed RGB 10T8B Mono 8T10B Mono 80B Packed RGB 80B Packed Bi Color 10T8B Bayer 8T10B Bayer TRUE FALSE Not available CORACQ_PRM_DATA_VALID_POLARITY CORACQ_VAL_ACTIVE_HIGH 0x2 CORACQ_PRM_TAP_9_DIRECTION 10T8B Mono 10T8B Bayer CORACQ_VAL_TAP_DIRECTION_LR 0x1 CORACQ_V...

Page 53: ...ixel min 24 pixel max 65530 pixel step 4 pixel min 24 pixel max 65536 pixel step 1 pixel min 24 pixel max 65536 pixel step 1 pixel min 24 pixel max 32768 pixel step 2 pixel min 24 pixel max 32768 pixel step 1 pixel min 4 pixel max 16384 pixel step 1 pixel min 4 pixel max 16384 pixel step 1 pixel min 4 pixel max 32768 pixel step 1 pixel CORACQ_PRM_CROP_HEIGHT min 1 line max 16777215 line step 1 lin...

Page 54: ...8T10B Bayer Default Area Scan 1 tap Mono Default Area Scan 10 taps Parallel Mono Default Area Scan 8 taps Parallel Mono Default Area Scan 1 tap Color Default Bayer Area Scan 1 tap Color Default Area Scan Full Packed RGB Default Area Scan 80 bit Packed RGBr Default Area Scan 80 bit Packed Bi Color Default Bayer Area Scan 10 taps Parallel Color Default Bayer Area Scan 8 taps Parallel Color CORACQ_PR...

Page 55: ... min 0 tick max 254 tick step 1 tick CORACQ_PRM_SHAFT_ENCODER_ENABLE TRUE FALSE CORACQ_PRM_EXT_TRIGGER_FRAME_COUNT min 1 frame max 262142 frame step 1 frame Note Infinite not supported CORACQ_PRM_INT_FRAME_TRIGGER_ENABLE TRUE FALSE CORACQ_PRM_INT_FRAME_TRIGGER_FREQ min 1 milli Hz max 1000000000 milli Hz step 1 milli Hz CORACQ_PRM_FRAME_LENGTH CORACQ_VAL_FRAME_LENGTH_FIX 0x1 CORACQ_VAL_FRAME_LENGTH...

Page 56: ...ayer Full Packed RGB 10T8B Bayer 8T10B Bayer Min 100000 max 900000 step 1 CORACQ_PRM_WB_GAIN_GREEN Full Bayer Full Packed RGB 10T8B Bayer 8T10B Bayer Min 100000 max 900000 step 1 CORACQ_PRM_WB_GAIN_BLUE Full Bayer Full Packed RGB 10T8B Bayer 8T10B Bayer Min 100000 max 900000 step 1 CORACQ_PRM_EXT_TRIGGER_IGNORE_DELAY Not available CORACQ_PRM_BOARD_SYNC_OUTPUT1_SOURCE min 0 max 6 step 1 CORACQ_PRM_...

Page 57: ... 10 Bit Mono Camera Link 10 Tap 8 Bit Mono Camera Link Full Bayer Camera Link Full Packed RGB Camera Link 80 Bit Packed 8 Bit RGB Camera Link 80 Bit Packed 8 Bit Bi Color Camera Link 10 Tap 8 Bit Bayer Camera Link 8 Tap 10 Bit Bayer CORACQ_PRM_EVENT_TYPE CORACQ_PRM_EVENT_TYPE_EX CORACQ_VAL_EVENT_TYPE_START_OF_FRAME CORACQ_VAL_EVENT_TYPE_END_OF_FRAME CORACQ_VAL_EVENT_TYPE_EXTERNAL_TRIGGER CORACQ_VA...

Page 58: ...RXFER_VAL_CYCLE_MODE_OFF 0x3 CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_NEXT_EMPTY_WITH_TRASH 0x5 CORXFER_PRM_FLIP CORXFER_VAL_FLIP_OFF 0x0 CORXFER_VAL_FLIP_VERT 0x2 CORXFER_PRM_INT_BUFFERS Depends on acquired image size By default driver will optimize the number of on board buffers CORXFER_PRM_EVENT_COUNT_SOURCE CORXFER_VAL_EVENT_COUNT_SOURCE_DST 0x1 CORXFER_VAL_EVENT_COUNT_SOURCE_SRC 0x2 CORXFER_PRM_BUF...

Page 59: ...LY 0x03 depends on external trigger inputs reserved for acquisition device Table 17 GIO 1 Related Capabilities General Inputs 1 Related Parameters for GIO Module 1 Parameter Values CORGIO_PRM_LABEL General Inputs 1 CORGIO_PRM_DEVICE_ID 1 CORGIO_PRM_INPUT_LEVEL CORGIO_VAL_INPUT_LEVEL_TTL 0x1 CORGIO_VAL_INPUT_LEVEL_422 0x2 CORGIO_VAL_INPUT_LEVEL_24VOLTS 0x8 CORGIO_VAL_INPUT_LEVEL_12VOLTS 0x40 CORGIO...

Page 60: ...ration Monochrome Camera Base and Medium configuration RGB Camera Full packed 8 bit RGB Camera Xtium CL_PX4_1 Full parallel firmware with Bayer conversion Acquisition Camera Link Full Bayer 0 Base Medium and Full configuration Bayer Camera Xtium CL_PX4_1 80 bit firmware Acquisition CameraLink 10 Tap 8 Bit Mono CameraLink 8 Tap 10 Bit Mono CameraLink 80 Bit Packed 8 Bit RGB CameraLink 80 Bit Packed...

Page 61: ...onfiguration for Sapera LT Sapera Processing and Teledyne DALSA framegrabbers The file is located in the following directory dependent on the platform used Install Directory Sapera Install Win7_Embedded Win32 Install Directory Sapera Install Win7_Embedded Win64 The OS footprint for these configurations is less than 1 GB Alternatively the Windows Thin Client configuration template provided by Micro...

Page 62: ...acked 8 bit RGB BGR 80 bit packed 8 bit Bi Color Scanning Area scan and Line scan Progressive Multi Tap Tap reversal Alternate Tap Configuration Scanning Directions Left to Right Up Down From Top Resolution note these are Xtium CL PX4 maximums not Camera Link specifications Horizontal Minimum 8 Pixels per tap 8 bits pixel Horizontal Maximum 8 bits pixel x 64k Pixels line 16 bits pixel x 32k Pixels...

Page 63: ...rements Xtium CL PX4 Dimensions Approximately 4 in 10 cm wide by 4 in 10 cm high General System Requirements for the Xtium CL PX4 PCI Express Gen2 x4 slot compatible will work in Gen1 x4 slot with reduced bandwidth to host On some computers the Xtium CL PX4 may function installed in a x16 slot The computer documentation or direct testing by the user is required Xtium CL PX4 operates correctly when...

Page 64: ...62 Technical Specifications Xtium CL PX4 User s Manual EMI Certifications Figure 20 EMI Certifications ...

Page 65: ...d information concerning the connectors LEDs follows this summary table Location Description Location Description J1 External Signals connector DH60 27P J5 Multi Board Sync J2 Camera Link 2 Connector J7 PC power to camera interface and or J1 J3 Camera Link 1 Connector D1 Boot up PCIe Status LED refer to text P2 PCIe x4 computer bus connector Gen2 compliant slot preferred D3 D4 Camera status LEDs J...

Page 66: ...cables see Camera Link Cables on page 84 The Xtium CL PX4 board supports a camera with one or two Camera Link connectors one Base one Medium or one Full see Data Port Summary on page 83 for information on Camera Link configurations Connect the camera to the J3 connector with a Camera Link cable When using a Medium or Full camera connect the second camera connector to J2 Note If the camera is power...

Page 67: ... Safe FPGA firmware loaded Gen1 speed Red Flashing PCIe Training Issue Board will not be detected by computer Table 26 D1 Boot up PCIe Status LED Camera Link LEDs D4 Camera Link connector 1 D3 Camera Link connector 2 Color State Description Red Solid No Camera Link pixel clock detected Green Solid Camera Link pixel clock detected No line valid detected Note for D3 when configuring for Full CameraL...

Page 68: ... Frame Grabber SERTFG 6 Input Pos Serial Data to Frame Grabber CC1 18 Output Neg Camera Control 1 CC1 5 Output Pos Camera Control 1 CC2 17 Output Pos Camera Control 2 CC2 4 Output Neg Camera Control 2 CC3 16 Output Neg Camera Control 3 CC3 3 Output Pos Camera Control 3 CC4 15 Output Pos Camera Control 4 CC4 2 Output Neg Camera Control 4 PoCL 1 26 12 V see note following table GND 13 14 Ground Tabl...

Page 69: ...sistor TERM 7 Term Resistor FULL_X0 19 Input Neg Full Data 0 FULL _X0 6 Input Pos Full Data 0 FULL _X1 18 Input Neg Full Data 1 FULL _X1 5 Input Pos Full Data 1 FULL _X2 17 Input Neg Full Data 2 FULL _X2 4 Input Pos Full Data 2 FULL _X3 15 Input Neg Full Data 3 FULL _X3 2 Input Pos Full Data 3 FULL _XCLK 16 Input Neg Full Clock FULL _XCLK 3 Input Pos Full Clock PoCL 1 26 12 V see note following ta...

Page 70: ... 4 control signals These control signals are used either as camera control pulses or as a static logic state Control signals not required by the camera are simply assigned as not used Refer to your camera s user manual for information on what control signals are required Note 1 The Xtium CL PX4 pulse controller has a minimum resolution of 20ns Note 2 The internal line trigger frequency has a 2µs r...

Page 71: ...tor Signals Note 1 General Inputs External Trigger Inputs Specifications Each of the four General Inputs are opto coupled and able to connect to single ended source signals General Input 1 and 2 can also act as External Trigger Inputs See Board Information user settings These inputs generate individual interrupts and are read by the Sapera application The following figure is typical for each Gener...

Page 72: ...so cvi file entries External Trigger Level External Frame Trigger Level External Trigger Enable External Trigger Detection External Trigger Input 2 used for two pulse external trigger with variable frame length line scan acquisition Trigger Signal Total Delay Opto Coupler t oc Debouncer 1 255 us t d External Trigger t et Validated Trigger t vt t et t oc t d Figure 25 External Trigger Input Validat...

Page 73: ...ut 1 Strobe 11 Ground 10 General Input 2 Trigger 2 9 General Input 1 Trigger 1 8 Input Common Ground 7 Shaft Encoder B 6 Shaft Encoder B 5 Ground 4 Shaft Encoder A 3 Shaft Encoder A 2 Ground 1 External Driver Electrical Requirements The Xtium CL allows user selected software programmable input switching points to support TTL RS 422 12V or 24V input signals The following table defines the external ...

Page 74: ...s resistor The 2 diodes protects the LVTTL buffer against overvoltage Each output is a tri state driver enabled by software Minimum guaranteed output current is 24mA 3 3V Maximum short circuit output current is 44mA Minimum voltage for output level high is 2 4V while maximum voltage for output low is 0 55V Maximum output switching frequency is limited by driver and register access on the PCIe bus ...

Page 75: ...22 General Output 3 21 Reserved Reserved 19 20 Reserved 18 Reserved 17 General Input 4 16 General Input 3 15 Power 12 Volts 14 Ground 13 General Output 2 12 General Output 1 Strobe 11 Ground 10 General Input 2 Trigger 2 9 General Input 1 Trigger 1 8 Input Common Ground 7 Shaft Encoder B 6 Shaft Encoder B 5 Ground 4 Shaft Encoder A 3 Shaft Encoder A 2 Ground 1 External Receiver Electrical Requireme...

Page 76: ...istor Maximum input signal frequency is 10 MHz The Xtium CL provides ESD filtering on board See Line Trigger Source Selection for Line scan Applications on page 39 for more information Refer to Sapera parameters CORACQ_PRM_SHAFT_ENCODER_ENABLE CORACQ_PRM_SHAFT_ENCODER_DROP or refer to CORACQ_PRM_EXT_LINE_TRIGGER_ENABLE CORACQ_PRM_EXT_LINE_TRIGGER_DETECTION CORACQ_PRM_EXT_LINE_TRIGGER_LEVEL fixed a...

Page 77: ...put 1 Trigger 1 8 Input Common Ground 7 Shaft Encoder B 6 Shaft Encoder B 5 Ground 4 Shaft Encoder A 3 Shaft Encoder A 2 Ground 1 Figure 28 External RS 422 Signals Connection Diagram Note 3 2 Interfacing to a TTL also called Push Pull Output RS 422 input RS 422 input FG system GND DC Bias Voltage 2V GND Frame Grabber System Interfacing TTL Output to RS 422 Inputs via a Line Buffer Driver TTL signa...

Page 78: ...c 2 GND Frame Grabber System Interfacing Line Driver Open Emitter Output to RS 422 Inputs Generic Line Driver Open Emitter Output Vcc tull down resistor needed if it is not already present in the Shaft Encoder Value depends on the characteristics of the Shaft Encoder Output 100 oOm Note 3 4 Interfacing to an Open Collector Output RS 422 input RS 422 input FG system GND DC Bias Voltage Vcc 2 GND Fr...

Page 79: ...rs are installed Hardware Preparation Interconnect two three or four Xtium boards via their J5 connector using the OR YXCC BSYNC20 cable for 2 boards or the OR YXCC BSYNC40 cable see Board Sync Cable Assembly OR YXCC BSYNC40 for 3 or 4 boards Configuration via Sapera Application Programming Sync Master Board Software Setup Choose one Xtium as Sync Master The Sapera parameter CORACQ_PRM_BOARD_SYNC_...

Page 80: ...onnector DC Power Details Warning Never remove or install any hardware component with the computer power on Never connect a power cable to J7 when the computer is powered on Connect a computer 6 pin PCI Express power connector to J7 to supply DC power to the Camera Link connectors for PoCL operation and or to supply power to connector J1 Older computers may need a power cable adapter see Power Cab...

Page 81: ...sists of a 2000 mm 6 ft blunt end cable to mate to Xtium external connector J1 Note The applicable wiring color code table is included with the printed Product Notice shipped with the cable package no other wiring table should be used Important Cable part number OR YXCC 27BE2M0 rev 3 is obsolete and should not be used with any Xtium series boards Figure 30 DH60 27P Cable No OR YXCC 27BE2M1 Detail ...

Page 82: ...Custom Wiring Teledyne DALSA makes available a kit comprised of the DH40 27S connector plus a screw lock housing package for clients interested in assembling their own custom I O cable Order part number OR YXCC H270000 package as shown below Table 32 OR YXCC H270000 Custom Wiring Kit ...

Page 83: ...e Assembly OR YXCC BSYNC40 This cable connects 3 to 4 Xtium boards for the board sync function as described in section J5 Multi Board Sync Bi directional General I Os For a shorter 2 board cable order cable assembly OR YXCC BSYNC20 Figure 32 Photo of cable OR YXCC BSYNC40 ...

Page 84: ...m external power source connector J7 Recent computer power supplies provide multiple 6 pin power source connectors for PCI Express video cards where one is connected to J7 on the Xtium CL But if the computer is an older model this power supply adapter converts 2 standard 4 pin large power connectors to a 6 pin power connector Figure 33 Photo of cable assembly OR YXCC PWRY00 This is an industry sta...

Page 85: ... Camera Link logo as a certification mark for the mutual benefit of the industry The AIA will issue a license to any company member or non member to use the Camera Link logo with any products that the company will self certify to be compliant with the Camera Link standard Licensed users of the Camera Link logo will not be required to credit the AIA with ownership of the registered mark 3M is a tra...

Page 86: ... CC4 Note the Xtium CL PX4 by default implements the control lines as follows using Teledyne DALSA terminology CC1 EXYNC CC2 PRIN CC3 FORWARD CC4 HIGH Communication Two LVDS pairs are allocated for asynchronous serial communication to and from the camera and frame grabber Cameras and frame grabbers should support at least 9600 baud SerTFG Differential pair with serial communications to the frame g...

Page 87: ...0 2000 Fax 978 670 2010 Teledyne DALSA GMBH Felix Wankel Str 1 82152 Krailling Germany Tel 49 89 89 54 57 3 80 Fax 49 89 89 54 57 3 46 Asian Sales Teledyne DALSA Asia Pacific Ikebukuro East 13F 3 4 3 Higashi Ikebukuro Toshima ku Tokyo Japan Tel 81 3 5960 6353 Fax 81 3 5960 6354 Shanghai Industrial Investment Building Room G 20F 18 North Cao Xi Road Shanghai China 200030 Tel 86 21 64279081 Fax 86 2...

Page 88: ...LE 74 CORACQ_PRM_SHAFT_ENCODER_LEVEL 74 CORACQ_PRM_STROBE_DELAY 72 CORACQ_PRM_STROBE_DURATION 72 CORACQ_PRM_STROBE_ENABLE 72 CORACQ_PRM_STROBE_LEVEL 72 CORACQ_PRM_STROBE_METHOD 72 CORACQ_PRM_STROBE_POLARITY 72 D Data Overflow event 43 Data Transfer Engine 8 Device Manager 11 18 26 device report 18 driver upgrade 16 E Embedded Windows answer files 59 End of Frame event 44 End of Transfer event 44 E...

Page 89: ... buffers 21 Scatter Gather 8 serial communication port 17 serial port speeds 17 shaft encoder 8 39 software trigger 28 70 Static electricity 10 system COM port 17 T technical support 16 18 25 27 transfer module 44 trigger 8 39 41 V viewer program 27 virtual frame buffer 41 visual LED indicators 8 W Web inspection 39 Windows Embedded 7 59 Windows HyperTerminal 17 Windows operating system memory 21 ...

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