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Service Manual CP-099F
Each relaxation oscillator of the VIF-PLL and FM-PLL demodulator has a wide frequency range. To prevent false locking of the
PLL's and with respect to the catching range, the digital acquisition help provides an individual control until the VCO's frequency
is within the preselected standard and the PLL dependent lock-in window.
The in/out window control at FM-PLL is additionally be used to mete the audio stage (if auto mute is selected via I
2
C-bus control).
The principle working of the digital acquisition help is as follows : The PLL VCO output is connected to a down counter, which
start value is standard dependent predefined. The VCO frequency clocks the down counter for a fixed gate time. Thereafter the down
counter stop value is analysed. In case the stop value is higher (lower) than the expected value range, the VCO frequency is lower
(higher) than the wanted lock-in window frequency range. A positive (negative) control current is injected into the PLL loop filter
and consequently the VCO frequency will be increased (decreased) and a new counting cycle starts.
The gate time as well as the control logic of the acquisition help circuit is dependent on the precision of the reference signal at pin
15. Operation as crystal oscillator is possible as well as connecting this input via a serial capacitor to another reference frequency
source e.g. the tuning system oscillator.
The AFC signal is derived from the corresponding down counter stop value after a counting cycle. The last four bits are latched and
can be read out via I
2
C-bus (see Table 7). also the digital-to-analog converted value is given as current at pin 21.
5-2-6 Digital acquisition help and AFC
The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF signal is
multiplied with the 'in phase' signal or the VIF-PLL VCO.
The demodulator output signal is fed into the video preamplifier via a level shift stage with integrated low-pass filter to achieve carrier
harmonic attenuation.
The preamplifiers output signal is fed to the VIF-AGC detector (see Section "VIF-AGC detector") and in case of sound trap mode
internally to the integrated sound carrier trap(see Section "Sound carrier trap".) The differential trap output signal is converted and
amplified by the following post-amplifier. The video output level at pin 17 is 2 V(p-p).
In case of bypass mode the preamplifiers output signal is fed direct through the post-amplifier to pin 17. The output video level is 1.1
V(p-p) for using an external sound trap with 10% loss over all. Noise clipping is provided in both cases.
5-2-7 Video demodulator and amplifier
The sound carrier trap consists of a reference filter, a phase detector and the sound trap itself. A sound carrier reference signal is fed
into the reference low-pass filter and is shifted by nominal 90 degrees.
The phase detector compares the original reference signal with the signal shifted by the reference filter and proudces a DC voltage by
charging/discharging the capacitor with a current proportional to the phase difference between both signals, respectively to the frequency
error of the integrated filters. The DC voltage controls the frequency position of the reference filter and the sound trap. So the accurate
frequency position or the different standard is set by the sound carrier reference signal.
The sound trap itself is constructed of three separate traps to realize sufficient suppression of the first and second sound carrier.
5-2-8 Sound carrier trap
5-2-9 SIF amplifier
SIF gain control is performed by detection of the DC component of the AM demodulator output signal. This DC signal is directly co-
rresponding to the SIF voltage at the output of the SIF amplifier so that a constant SIF signal is supplied to the AM demodulator and
the single reference QSS mixer.
By switching the gain of the input amplifier of the SIF AGC detector Via I
2
C-bus the internal SIF level for FM sound is 5.5 dB lower
than for AM sound. This is done to adapt the SIF-AGC characteristic. The adaption is optimal for picture-to-sound carrier ratio of 13 dB.
Via a comparator the integrated AGC capacitor is charged/discharged for generation of the required SIF gain. Due to AM sound the
AGC reaction time is slow (f
c
< 20 Hz for the closed AGC loop.) For reducing this AM sound time constant in the event of a decreasing
IF amplitude step, the charging/discharging current of the AGC capacitor is increased (fast mode), when the VIF-AGC detector (at
positive modulation mode) operates in fast mode, too. An additional circuit (threshold about +7 dB) ensures a very fast gain reduction
for a large increasing IF amplitude step.
5-2-10 AGC detector
The SIF amplifier consists of three AC-coupled differential stages. Gain control is performed by emitter degeneration, Total gain control
range is 66dB typical. The differential input impedance is typical 2k in parallel with 3 pF.
Summary of Contents for DDT-21H9ZZF
Page 17: ...16 Service Manual CP 099F...
Page 36: ...Service Manual CP 099F 35 5 Circuit desription 5 1 Block diagram...
Page 60: ...Service Manual CP 099F 59 5 11 3 SCHEMATIC DIAGRAM 5 11 3 1 AUDIO...
Page 61: ...Service Manual CP 099F 60 5 11 3 2 DRIVE RF...
Page 62: ...Service Manual CP 099F 61 5 11 3 3 DSP...
Page 63: ...Service Manual CP 099F 62 5 11 3 4 MICOM...
Page 64: ...Service Manual CP 099F 63 5 11 3 5 MPEG...
Page 77: ...Service Manual CP 099F 76 9 PRINTED CIRCUIT BOARD 9 1 DVD PCB The upper...
Page 78: ...Service Manual CP 099F 9 2 DVD PCB The lower 77...
Page 79: ...Service Manual CP 099F 9 3 POWER PCB 78...
Page 80: ...Service Manual CP 099F 9 4 MAIN PCB 79...
Page 81: ...80 Service Manual CP 099F 10 SCHEMATIC DIAGRAM 10 1 POWER CRT...
Page 82: ...81 Service Manual CP 099F 10 SCHEMATIC DIAGRAM 10 2 PCB MAIN...