File Documentation
FM4, S6E2DH/S6E2DF/S6E2D5/S6E2D3 Series, 32-Bit Microcontroller, Graphic Driver User Manual, Doc. No. 002-04387 Rev. *A
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13.8 mmd_gdc_interrupthandler.h File Reference
2D Core Interrupt Controller API
#include "mm_types.h"
Macros
#define MM_GDC_IRIS_INT_STORE9_FRAMECOMPLETE_IRQ_CP 1U
#define MM_GDC_IRIS_INT_EXTDST0_FRAMECOMPLETE_IRQ_CP 4U
#define MM_GDC_IRIS_INT_DISENGCFG_FRAMECOMPLETE0_IRQ_CP 10U
#define MM_GDC_IRIS_INT_CMDSEQ_ERROR_IRQ_CP 20U
#define MM_GDC_IRIS_INT_FRAMEGEN0_SECSYNC_ON_IRQ_CP 27U
#define MM_GDC_IRIS_INT_FRAMEGEN0_SECSYNC_OFF_IRQ_CP 28U
Interrupt signal irqs
These can be used in mmdGdcInterruptRegisterHandler
#define MM_GDC_IRIS_STORE9_FRAMECOMPLETE_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_STORE9_FRAMECOMPLETE_IRQ_CP)
#define MM_GDC_IRIS_EXTDST0_FRAMECOMPLETE_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_EXTDST0_FRAMECOMPLETE_IRQ_CP)
#define MM_GDC_IRIS_DISENGCFG_FRAMECOMPLETE0_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_DISENGCFG_FRAMECOMPLETE0_IRQ_CP)
#define MM_GDC_IRIS_CMDSEQ_ERROR_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_CMDSEQ_ERROR_IRQ_CP)
#define MM_GDC_IRIS_FRAMEGEN0_SECSYNC_ON_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_FRAMEGEN0_SECSYNC_ON_IRQ_CP)
#define MM_GDC_IRIS_FRAMEGEN0_SECSYNC_OFF_IRQ ((MM_U64)1 <<
MM_GDC_IRIS_INT_FRAMEGEN0_SECSYNC_OFF_IRQ_CP)
Functions
Interrupt Operations Functions
void mmdGdcInterruptHandler (void)
Interrupt Handler Function.
MM_ERROR mmdGdcInterruptRegisterHandler (MM_U64 irq, void(*pHandler)(MM_U64 intrrpt))
Set an application defined interrupt handler function.
13.8.1 Detailed Description
2D Core Interrupt Controller API