CY8CKIT-147 PSoC® 4100PS Prototyping Kit Guide, Doc. #: 002-18734 Rev. *D
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Table A-1. J1 Header Pin Details
Table A-2. J2 Header Pin Details
PSoC 4100PS Prototyping kit GPIO Header J1
Pin
Signal
Description
J1_01
VDDD
Power
J1_02
GND
Ground
J1_03
RST
Reset
J1_04
P1[0]
GPIO
J1_05
P1[1]
GPIO
J1_06
P1[2]
GPIO
J1_07
P1[3]
GPIO
J1_08
P1[4]
GPIO
J1_09
P1[5]
GPIO
J1_10
P1[6]
GPIO
J1_11
P1[7]
GPIO
J1_12
P3[0]
GPIO
J1_13
P3[1]
GPIO
J1_14
P3[2]
GPIO
J1_15
P3[3]
GPIO
J1_16
P3[4]
GPIO
J1_17
P3[5]
GPIO
J1_18
P3[6]
GPIO / SCL
J1_19
P3[7]
GPIO / SDA
J1_20
P5[0]
GPIO / CMOD
J1_21
P5[1]
GPIO
J1_22
P5[2]
GPIO / CINTA
J1_23
GND
Ground
PSoC 4100PS Prototyping kit GPIO Header J2
Pin
Signal
Description
J2_01
VDDA
Power
J2_02
GND
Ground
J2_03
P0[0]
GPIO / SWDIO
J2_04
P0[1]
GPIO / SWDCLK
J2_05
P0[2]
GPIO / User LED
J2_06
P0[3]
GPIO / User Switch
J2_07
P0[4]
GPIO / UART_RX
J2_08
P0[5]
GPIO / UART_TX
J2_09
P0[6]
GPIO
J2_10
P0[7]
GPIO
J2_11
P2[0]
GPIO
J2_12
P2[1]
GPIO
J2_13
P2[2]
GPIO
J2_14
P2[3]
GPIO
J2_15
P2[4]
GPIO
J2_16
P2[5]
GPIO
J2_17
P2[6]
GPIO
J2_18
P2[7]
GPIO
J2_19
P4[0]
GPIO
J2_20
P4[1]
GPIO
J2_21
P5[3]
GPIO / CINTB
J2_22
GND
Ground
J2_23
VDDD
Power