CapSense Selector Guide
AN64846 - Getting Started with CapSense
®
Doc. No. 001-64846 Rev. *X
97
Table 4-4. PSoC 5LP Family Features Comparison
Features/Device Family
PSoC 5200
PSoC 5400
PSoC 5600
PSoC 5800
Datasheet
CPU and Speed
ARM Cortex-M3 clocked up to 80 MHz
Flash, SRAM, EEPROM
Up to 256 KB, Up to 64 KB, 2 KB
Total I/Os
Up to 72
CapSense I/Os
(Supports
Button, Slider, Proximity,
Shield)
Up to 62
Number of CapSense
Blocks
2
Liquid Tolerance
Yes
SmartSense Auto-Tuning
Yes
ADC
1x 12-bit SAR
1x 12-bit SAR or
1x 12-bit Del-Sig
2x 12-bit SAR or
1x 12-bit Del-Sig and 1x
12-bit SAR
2x 12-bit SAR and 1x
20-bit Del-Sig
DAC
1x 8-bit
2x 8-bit
4x 8-bit
4x 8-bit
Comparators
2
4
4
4
Op-Amps
0
2
4
4
SC/ST Analog Block
19
0
2
4
4
Universal Digital Block
(UDB
20
)
Up to 24
16-bit Timer/PWM
4
Digital Filter Block
(DFB
21
)
No
No
Yes
Yes
Segment LCD Drive
Up to 46x16 segments
USB 2.0 Full-Speed
Peripheral
Yes
CAN 2.0
22
No
No
Yes
Yes
Package
68-pin QFN
100-pin TQFP
99-pin WLCSP
23
Automotive Qualified
(AEC-Q100)
No
Operating Voltage
1.71-5.5V
19
Switched Capacitor/Continuous Time blocks, which are programmable to work as Opamp, Unity Gain Buffer, Programmable Gain
Amplifier, Transimpedance Amplifier (TIA), etc.
20
Universal Digital Block (UDB) allows implementing custom digital logic. PSoC Creator provides wide variety of UDB based
components such as I2C, I2S, UART, SPI, LIN Slave, PWM, Counter/Timer etc.
21
Digital Filter Block (DFB) is programmable to perform IIR and FIR digital filters and several custom functions. It is capable of
implementing filters with up to 64 taps and of 48-bit single-cycle multiply-accumulate (MAC) operation.
22
Controller Area Network
23
Wafer-Level Chip-scale Package